Lines Matching refs:__BITS
37 #define SA2400_TWI_DATA_MASK __BITS(31,8)
39 #define SA2400_TWI_ADDR_MASK __BITS(6,0)
49 #define SA2400_SYNA_NF_MASK __BITS(20,18) /* fractional increment value,
52 #define SA2400_SYNA_N_MASK __BITS(17,2) /* main divider division ratio,
57 #define SA2400_SYNB_R_MASK __BITS(21,12) /* reference divider ratio,
60 #define SA2400_SYNB_L_MASK __BITS(11,10) /* lock detect mode */
72 #define SA2400_SYNB_FC_MASK __BITS(7,0) /* fractional compensation
78 #define SA2400_SYNC_CP_MASK __BITS(7,6) /* charge pump current
86 #define SA2400_SYNC_SM_MASK __BITS(5,3) /* comparison divider select,
93 #define SA2400_SYND_ZERO1_MASK __BITS(21,17) /* always 0 */
101 #define SA2400_SYND_ZERO2_MASK __BITS(14,3) /* always 0 */
113 #define SA2400_OPMODE_FILTTUNE_MASK __BITS(17,15)
143 #define SA2400_OPMODE_MODE_MASK __BITS(3,0)
161 #define SA2400_AGC_TARGET_MASK __BITS(22,20) /* ... plus 0dB - 7dB */
162 #define SA2400_AGC_MAXGAIN_MASK __BITS(19,15) /* maximum AGC gain, 0 to 31,
169 #define SA2400_AGC_BBPDELAY_MASK __BITS(14,10)
176 #define SA2400_AGC_LNADELAY_MASK __BITS(9,5)
183 #define SA2400_AGC_RXONDELAY_MASK __BITS(4,0)
201 #define SA2400_MANRX_RXOSQ_MASK __BITS(20,18)
205 #define SA2400_MANRX_RXOSI_MASK __BITS(15,13)
215 #define SA2400_MANRX_CORNERFREQ_MASK __BITS(11,10)
220 #define SA2400_MANRX_RXGAIN_MASK __BITS(9,0)
230 #define SA2400_TX_TXOSQ_MASK __BITS(17,15)
233 #define SA2400_TX_TXOSI_MASK __BITS(12,10)
235 #define SA2400_TX_RAMP_MASK __BITS(9,8) /* Ramp-up delay,
243 #define SA2400_TX_HIGAIN_MASK __BITS(7,4) /* Transmitter gain settings
246 #define SA2400_TX_LOGAIN_MASK __BITS(3,0) /* Transmitter gain settings
251 #define SA2400_VCO_ZERO __BITS(6,5) /* always zero */
256 #define SA2400_VCO_VCOBAND_MASK __BITS(3,0) /* VCO band,
Indexes created Sun Oct 19 21:10:07 GMT 2025