Lines Matching refs:sc_c
114 if ((sc->sc_c.features & SF_CHIP_RAM) == 0)
115 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0,
124 if (sc->sc_c.features & SF_CHIP_RAM) {
125 return bus_space_read_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
128 return siop_ctoh32(&sc->sc_c, sc->sc_c.sc_script[offset]);
138 if (sc->sc_c.features & SF_CHIP_RAM) {
139 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
142 sc->sc_c.sc_script[offset] = siop_htoc32(&sc->sc_c, val);
150 if (siop_common_attach(&sc->sc_c) != 0)
159 device_xname(sc->sc_c.sc_dev), (int)sizeof(siop_script),
160 (uint32_t)sc->sc_c.sc_scriptaddr, sc->sc_c.sc_script);
163 sc->sc_c.sc_adapt.adapt_max_periph = SIOP_NTAG - 1;
164 sc->sc_c.sc_adapt.adapt_request = siop_scsipi_request;
167 siop_resetbus(&sc->sc_c);
176 config_found(sc->sc_c.sc_dev, &sc->sc_c.sc_chan, scsiprint, CFARGS_NONE);
185 siop_common_reset(&sc->sc_c);
188 if (sc->sc_c.features & SF_CHIP_RAM) {
189 bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 0,
192 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
194 sc->sc_c.sc_scriptaddr + Ent_msgin_space);
196 if (sc->sc_c.features & SF_CHIP_LED0) {
197 bus_space_write_region_4(sc->sc_c.sc_ramt,
198 sc->sc_c.sc_ramh,
201 bus_space_write_region_4(sc->sc_c.sc_ramt,
202 sc->sc_c.sc_ramh,
205 bus_space_write_region_4(sc->sc_c.sc_ramt,
206 sc->sc_c.sc_ramh,
212 sc->sc_c.sc_script[j] =
213 siop_htoc32(&sc->sc_c, siop_script[j]);
216 sc->sc_c.sc_script[E_abs_msgin_Used[j]] =
217 siop_htoc32(&sc->sc_c,
218 sc->sc_c.sc_scriptaddr + Ent_msgin_space);
220 if (sc->sc_c.features & SF_CHIP_LED0) {
222 sc->sc_c.sc_script[
224 ] = siop_htoc32(&sc->sc_c, siop_led_on[j]);
226 sc->sc_c.sc_script[
228 ] = siop_htoc32(&sc->sc_c, siop_led_on[j]);
230 sc->sc_c.sc_script[
232 ] = siop_htoc32(&sc->sc_c, siop_led_off[j]);
236 sc->script_free_hi = sc->sc_c.ram_size / 4;
243 device_xname(sc->sc_c.sc_dev), lunsw->lunsw_off);
250 for (i = 0; i < sc->sc_c.sc_chan.chan_ntargets; i++) {
252 if (sc->sc_c.targets[i] == NULL)
256 device_xname(sc->sc_c.sc_dev), i);
258 target = (struct siop_target *)sc->sc_c.targets[i];
262 aprint_error_dev(sc->sc_c.sc_dev,
270 if ((sc->sc_c.features & SF_CHIP_RAM) == 0) {
271 bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0,
274 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP,
275 sc->sc_c.sc_scriptaddr + Ent_reselect);
282 sc->sc_c.sc_scriptaddr + ent); \
283 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, \
284 SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \
288 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, \
289 SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \
310 istat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT);
316 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
322 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
327 dsa = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA);
372 dstat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
377 siop_clearfifo(&sc->sc_c);
382 (int)(bus_space_read_4(sc->sc_c.sc_rt,
383 sc->sc_c.sc_rh, SIOP_DSP) -
384 sc->sc_c.sc_scriptaddr),
385 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
389 bus_space_write_1(sc->sc_c.sc_rt,
390 sc->sc_c.sc_rh, SIOP_DCNTL,
391 bus_space_read_1(sc->sc_c.sc_rt,
392 sc->sc_c.sc_rh, SIOP_DCNTL) | DCNTL_STD);
408 siop_clearfifo(&sc->sc_c);
410 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
411 SIOP_DSP) - sc->sc_c.sc_scriptaddr),
412 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA));
416 siop_ctoh32(&sc->sc_c,
419 aprint_error_dev(sc->sc_c.sc_dev,
431 sist = bus_space_read_2(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
433 sstat1 = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
438 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
440 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA),
441 (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
443 sc->sc_c.sc_scriptaddr));
454 printf("%s:", device_xname(sc->sc_c.sc_dev));
461 dstat = bus_space_read_1(sc->sc_c.sc_rt,
462 sc->sc_c.sc_rh, SIOP_DSTAT);
467 bus_space_write_4(sc->sc_c.sc_rt,
468 sc->sc_c.sc_rh,
470 scratcha0 = bus_space_read_1(sc->sc_c.sc_rt,
471 sc->sc_c.sc_rh, SIOP_SCRATCHA);
485 siop_clearfifo(&sc->sc_c);
498 siop_clearfifo(&sc->sc_c);
499 bus_space_write_1(sc->sc_c.sc_rt,
500 sc->sc_c.sc_rh, SIOP_SCRATCHA,
505 aprint_error_dev(sc->sc_c.sc_dev,
509 aprint_error_dev(sc->sc_c.sc_dev,
519 printf("%s:", device_xname(sc->sc_c.sc_dev));
531 aprint_error_dev(sc->sc_c.sc_dev,
544 siop_htoc32(&sc->sc_c, SCSI_CHECK);
547 sc_c.sc_dev,
554 if (siop_modechange(&sc->sc_c) == 0 || need_reset == 1)
567 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
569 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
574 aprint_error_dev(sc->sc_c.sc_dev,
577 bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
579 bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA),
580 (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
581 SIOP_DSP) - sc->sc_c.sc_scriptaddr));
592 siop_resetbus(&sc->sc_c);
599 irqcode = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
610 aprint_error_dev(sc->sc_c.sc_dev,
617 aprint_error_dev(sc->sc_c.sc_dev,
627 (int)(bus_space_read_4(sc->sc_c.sc_rt,
628 sc->sc_c.sc_rh, SIOP_DSP) -
629 sc->sc_c.sc_scriptaddr));
637 aprint_error_dev(sc->sc_c.sc_dev,
642 target = bus_space_read_1(sc->sc_c.sc_rt,
643 sc->sc_c.sc_rh, SIOP_SCRATCHA) & 0xf;
644 lun = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
646 tag = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
649 (struct siop_target *)sc->sc_c.targets[target];
652 device_xname(sc->sc_c.sc_dev), target);
658 "lun %d\n", device_xname(sc->sc_c.sc_dev),
665 device_xname(sc->sc_c.sc_dev),
670 bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
678 device_xname(sc->sc_c.sc_dev));
682 int msgin = bus_space_read_1(sc->sc_c.sc_rt,
683 sc->sc_c.sc_rh, SIOP_SFBR);
708 sc->sc_c.sc_dev));
720 siop_update_xfer_mode(&sc->sc_c,
729 sc->sc_c.st_minsync,
730 sc->sc_c.maxoff);
742 siop_update_xfer_mode(&sc->sc_c,
760 device_xname(sc->sc_c.sc_dev));
775 siop_htoc32(&sc->sc_c, 1);
784 printf("%s: ", device_xname(sc->sc_c.sc_dev));
789 siop_htoc32(&sc->sc_c, 1);
803 aprint_error_dev(sc->sc_c.sc_dev,
807 siop_htoc32(&sc->sc_c,
894 siop_htoc32(&sc->sc_c, 1);
901 offset = bus_space_read_1(sc->sc_c.sc_rt,
902 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1);
915 offset = bus_space_read_1(sc->sc_c.sc_rt,
916 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1);
930 device_xname(sc->sc_c.sc_dev),
940 siop_ctoh32(&sc->sc_c, siop_cmd->cmd_tables->id),
942 siop_ctoh32(&sc->sc_c,
947 offset = bus_space_read_1(sc->sc_c.sc_rt,
948 sc->sc_c.sc_rh, SIOP_SCRATCHA + 1);
984 xs->status = siop_ctoh32(&sc->sc_c, siop_cmd->cmd_tables->status);
998 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1);
1027 device_xname(sc->sc_c.sc_dev),
1051 bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data,
1055 bus_dmamap_unload(sc->sc_c.sc_dmat,
1058 bus_dmamap_unload(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_cmd);
1076 ((struct siop_target *)sc->sc_c.targets[target])->siop_lun[lun];
1129 ((struct siop_target*)sc->sc_c.targets[target])->siop_lun[lun];
1133 device_xname(sc->sc_c.sc_dev), target, lun, tag,
1140 "lun %d (status %d)\n", device_xname(sc->sc_c.sc_dev),
1177 printf("%s: scsi bus reset\n", device_xname(sc->sc_c.sc_dev));
1183 scsipi_channel_thaw(&sc->sc_c.sc_chan, 1);
1188 for (target = 0; target < sc->sc_c.sc_chan.chan_ntargets;
1190 if (sc->sc_c.targets[target] == NULL)
1194 (struct siop_target *)sc->sc_c.targets[target];
1199 ((sc->sc_c.targets[target]->flags & TARF_TAG) ?
1216 sc->sc_c.targets[target]->status = TARST_ASYNC;
1217 sc->sc_c.targets[target]->flags &= ~TARF_ISWIDE;
1218 sc->sc_c.targets[target]->period =
1219 sc->sc_c.targets[target]->offset = 0;
1220 siop_update_xfer_mode(&sc->sc_c, target);
1223 scsipi_async_event(&sc->sc_c.sc_chan, ASYNC_EVENT_RESET, NULL);
1262 siop_target = (struct siop_target *)sc->sc_c.targets[target];
1266 device_xname(sc->sc_c.sc_dev), target);
1268 sc->sc_c.targets[target] =
1271 if (sc->sc_c.targets[target] == NULL) {
1272 aprint_error_dev(sc->sc_c.sc_dev,
1283 (struct siop_target *)sc->sc_c.targets[target];
1287 sc->sc_c.clock_div << 24; /* scntl3 */
1294 aprint_error_dev(sc->sc_c.sc_dev,
1313 aprint_error_dev(sc->sc_c.sc_dev,
1325 siop_cmd->cmd_c.siop_target = sc->sc_c.targets[target];
1331 error = bus_dmamap_load(sc->sc_c.sc_dmat,
1335 aprint_error_dev(sc->sc_c.sc_dev,
1347 error = bus_dmamap_load(sc->sc_c.sc_dmat,
1353 aprint_error_dev(sc->sc_c.sc_dev,
1359 bus_dmamap_unload(sc->sc_c.sc_dmat,
1367 bus_dmamap_sync(sc->sc_c.sc_dmat,
1373 bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_cmd, 0,
1401 device_xname(sc->sc_c.sc_dev),
1402 sc->sc_c.sc_adapt.adapt_openings);
1410 if (sc->sc_c.targets[xm->xm_target] == NULL)
1414 sc->sc_c.targets[xm->xm_target]->flags |= TARF_TAG;
1416 (sc->sc_c.features & SF_BUS_WIDE))
1417 sc->sc_c.targets[xm->xm_target]->flags |= TARF_WIDE;
1419 sc->sc_c.targets[xm->xm_target]->flags |= TARF_SYNC;
1421 sc->sc_c.targets[xm->xm_target]->status == TARST_PROBING)
1422 sc->sc_c.targets[xm->xm_target]->status =
1425 for (lun = 0; lun < sc->sc_c.sc_chan.chan_nluns; lun++) {
1478 ((struct siop_target*)sc->sc_c.targets[target])->siop_lun[lun];
1512 scsipi_channel_freeze(&sc->sc_c.sc_chan, 1);
1540 siop_htoc32(&sc->sc_c, sc->sc_c.sc_scriptaddr +
1566 bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
1585 siop_resetbus(&sc->sc_c);
1630 aprint_error_dev(sc->sc_c.sc_dev,
1639 aprint_error_dev(sc->sc_c.sc_dev,
1643 error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE,
1646 sc_c.sc_dev,
1651 error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE,
1654 aprint_error_dev(sc->sc_c.sc_dev,
1659 error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0,
1662 aprint_error_dev(sc->sc_c.sc_dev,
1667 error = bus_dmamap_load(sc->sc_c.sc_dmat, newcbd->xferdma,
1670 aprint_error_dev(sc->sc_c.sc_dev,
1677 device_xname(sc->sc_c.sc_dev),
1680 off = (sc->sc_c.features & SF_CHIP_BE) ? 3 : 0;
1682 error = bus_dmamap_create(sc->sc_c.sc_dmat, MAXPHYS, SIOP_NSG,
1686 aprint_error_dev(sc->sc_c.sc_dev,
1691 error = bus_dmamap_create(sc->sc_c.sc_dmat,
1697 aprint_error_dev(sc->sc_c.sc_dev,
1701 newcbd->cmds[i].cmd_c.siop_sc = &sc->sc_c;
1710 xfer->siop_tables.t_msgout.count= siop_htoc32(&sc->sc_c, 1);
1711 xfer->siop_tables.t_msgout.addr = siop_htoc32(&sc->sc_c, dsa);
1712 xfer->siop_tables.t_msgin.count= siop_htoc32(&sc->sc_c, 1);
1713 xfer->siop_tables.t_msgin.addr = siop_htoc32(&sc->sc_c,
1715 xfer->siop_tables.t_extmsgin.count= siop_htoc32(&sc->sc_c, 2);
1716 xfer->siop_tables.t_extmsgin.addr = siop_htoc32(&sc->sc_c,
1718 xfer->siop_tables.t_extmsgdata.addr = siop_htoc32(&sc->sc_c,
1720 xfer->siop_tables.t_status.count= siop_htoc32(&sc->sc_c, 1);
1721 xfer->siop_tables.t_status.addr = siop_htoc32(&sc->sc_c,
1726 scr[j] = siop_htoc32(&sc->sc_c, load_dsa[j]);
1731 scr[Ent_rdsa0 / 4] = siop_htoc32(&sc->sc_c,
1733 scr[Ent_rdsa1 / 4] = siop_htoc32(&sc->sc_c,
1735 scr[Ent_rdsa2 / 4] = siop_htoc32(&sc->sc_c,
1737 scr[Ent_rdsa3 / 4] = siop_htoc32(&sc->sc_c,
1739 scr[E_ldsa_abs_reselected_Used[0]] = siop_htoc32(&sc->sc_c,
1740 sc->sc_c.sc_scriptaddr + Ent_reselected);
1741 scr[E_ldsa_abs_reselect_Used[0]] = siop_htoc32(&sc->sc_c,
1742 sc->sc_c.sc_scriptaddr + Ent_reselect);
1743 scr[E_ldsa_abs_selected_Used[0]] = siop_htoc32(&sc->sc_c,
1744 sc->sc_c.sc_scriptaddr + Ent_selected);
1745 scr[E_ldsa_abs_data_Used[0]] = siop_htoc32(&sc->sc_c,
1748 scr[Ent_ldsa_data / 4] = siop_htoc32(&sc->sc_c, 0x80000000);
1754 siop_ctoh32(&sc->sc_c,
1756 siop_ctoh32(&sc->sc_c,
1758 siop_ctoh32(&sc->sc_c,
1764 sc->sc_c.sc_adapt.adapt_openings += SIOP_NCMDPB;
1768 bus_dmamap_unload(sc->sc_c.sc_dmat, newcbd->xferdma);
1769 bus_dmamap_destroy(sc->sc_c.sc_dmat, newcbd->xferdma);
1771 bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg);
1801 if (sc->sc_c.features & SF_CHIP_RAM) {
1802 bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
1805 bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
1807 sc->sc_c.sc_scriptaddr + Ent_lunsw_return);
1810 sc->sc_c.sc_script[sc->script_free_lo + i] =
1811 siop_htoc32(&sc->sc_c, lun_switch[i]);
1812 sc->sc_c.sc_script[
1814 siop_htoc32(&sc->sc_c,
1815 sc->sc_c.sc_scriptaddr + Ent_lunsw_return);
1831 siop_target = (struct siop_target *)sc->sc_c.targets[target];
1848 sc->sc_c.sc_scriptaddr +
1869 siop_update_scntl3(sc, sc->sc_c.targets[target]);
1895 (struct siop_target *)sc->sc_c.targets[target];
1908 aprint_error_dev(sc->sc_c.sc_dev,
1914 ntargets = sc->sc_c.sc_chan.chan_ntargets - 1 - sc->sc_ntargets;
1932 aprint_error_dev(sc->sc_c.sc_dev,
1940 device_xname(sc->sc_c.sc_dev), target, lun);
1955 if (sc->sc_c.features & SF_CHIP_RAM) {
1956 bus_space_write_region_4(sc->sc_c.sc_ramt,
1957 sc->sc_c.sc_ramh,
1962 sc->sc_c.sc_script[sc->script_free_hi + i] =
1963 siop_htoc32(&sc->sc_c, tag_switch[i]);
1968 sc->sc_c.sc_scriptaddr + sc->script_free_hi * 4 +
1991 device_xname(sc->sc_c.sc_dev), target, lun);
1993 if (sc->sc_c.targets[target] == NULL)
1995 siop_target = (struct siop_target *)sc->sc_c.targets[target];
2006 device_xname(sc->sc_c.sc_dev), target, lun,
2016 free(sc->sc_c.targets[target], M_DEVBUF);
2017 sc->sc_c.targets[target] = NULL;
Indexes created Sat Oct 11 16:09:52 GMT 2025