Lines Matching refs:bus_space_write_2
210 bus_space_write_2(bst, bsh, INTR_STAT_REG_B, mask << 8);
222 bus_space_write_2(bst, bsh, INTR_ACK_REG_B, ack | (mask << 8));
432 bus_space_write_2(bst, bsh, CONFIG_REG_W, tmp);
495 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, RCR_SOFTRESET);
497 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0);
500 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0);
507 bus_space_write_2(bst, bsh, IAR_ADDR0_REG_W + i, tmp);
515 bus_space_write_2(bst, bsh, CONTROL_REG_W, (CTR_AUTO_RELEASE |
520 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RESET);
543 bus_space_write_2(bst, bsh, RX_PHY_CONTROL_REG_W,
566 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, tmp);
579 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, tmp);
670 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ALLOC | npages);
705 bus_space_write_2(bst, bsh, PACKET_NUM_REG_B, packetno);
708 bus_space_write_2(bst, bsh, POINTER_REG_W, PTR_AUTOINC /* | 0x0000 */);
714 bus_space_write_2(bst, bsh, DATA_REG_W, 0);
715 bus_space_write_2(bst, bsh, DATA_REG_W, (length + 6) & 0x7ff);
731 bus_space_write_2(bst, bsh, DATA_REG_W, oddbyte);
738 bus_space_write_2(bst, bsh, DATA_REG_W, 0);
748 bus_space_write_2(bst, bsh, DATA_REG_W,
758 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ENQUEUE);
816 bus_space_write_2(bst, bsh, DATA_REG_W, dbuf);
930 bus_space_write_2(bst, bsh, PACKET_NUM_REG_B, packetno);
936 bus_space_write_2(bst, bsh, POINTER_REG_W,
968 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, TCR_ENABLE);
970 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W,
978 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
1076 bus_space_write_2(bst, bsh, POINTER_REG_W,
1184 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RELEASE);
1322 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0);
1323 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0);
1415 bus_space_write_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W, val);
1464 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, mctl);
Indexes created Mon Oct 20 20:10:13 GMT 2025