Lines Matching refs:val
170 * [val in msecs, input clk in 0.1 MHz]
173 #define SBIC_TIMEOUT(val,clk) ((((val) * (clk)) / 800) + 1)
379 #define wd33c93_read_reg(sc,regno,val) \
382 (val) = bus_space_read_1((sc)->sc_regt,(sc)->sc_data_regh, 0); \
385 #define wd33c93_write_reg(sc,regno,val) \
388 bus_space_write_1((sc)->sc_regt, (sc)->sc_data_regh, 0, (val)); \
391 #define SET_SBIC_myid(sc,val) wd33c93_write_reg(sc,SBIC_myid,val)
392 #define GET_SBIC_myid(sc,val) wd33c93_read_reg(sc,SBIC_myid,val)
393 #define SET_SBIC_cdbsize(sc,val) wd33c93_write_reg(sc,SBIC_cdbsize,val)
394 #define GET_SBIC_cdbsize(sc,val) wd33c93_read_reg(sc,SBIC_cdbsize,val)
395 #define SET_SBIC_control(sc,val) wd33c93_write_reg(sc,SBIC_control,val)
396 #define GET_SBIC_control(sc,val) wd33c93_read_reg(sc,SBIC_control,val)
397 #define SET_SBIC_timeo(sc,val) wd33c93_write_reg(sc,SBIC_timeo,val)
398 #define GET_SBIC_timeo(sc,val) wd33c93_read_reg(sc,SBIC_timeo,val)
399 #define SET_SBIC_cdb1(sc,val) wd33c93_write_reg(sc,SBIC_cdb1,val)
400 #define GET_SBIC_cdb1(sc,val) wd33c93_read_reg(sc,SBIC_cdb1,val)
401 #define SET_SBIC_cdb2(sc,val) wd33c93_write_reg(sc,SBIC_cdb2,val)
402 #define GET_SBIC_cdb2(sc,val) wd33c93_read_reg(sc,SBIC_cdb2,val)
403 #define SET_SBIC_cdb3(sc,val) wd33c93_write_reg(sc,SBIC_cdb3,val)
404 #define GET_SBIC_cdb3(sc,val) wd33c93_read_reg(sc,SBIC_cdb3,val)
405 #define SET_SBIC_cdb4(sc,val) wd33c93_write_reg(sc,SBIC_cdb4,val)
406 #define GET_SBIC_cdb4(sc,val) wd33c93_read_reg(sc,SBIC_cdb4,val)
407 #define SET_SBIC_cdb5(sc,val) wd33c93_write_reg(sc,SBIC_cdb5,val)
408 #define GET_SBIC_cdb5(sc,val) wd33c93_read_reg(sc,SBIC_cdb5,val)
409 #define SET_SBIC_cdb6(sc,val) wd33c93_write_reg(sc,SBIC_cdb6,val)
410 #define GET_SBIC_cdb6(sc,val) wd33c93_read_reg(sc,SBIC_cdb6,val)
411 #define SET_SBIC_cdb7(sc,val) wd33c93_write_reg(sc,SBIC_cdb7,val)
412 #define GET_SBIC_cdb7(sc,val) wd33c93_read_reg(sc,SBIC_cdb7,val)
413 #define SET_SBIC_cdb8(sc,val) wd33c93_write_reg(sc,SBIC_cdb8,val)
414 #define GET_SBIC_cdb8(sc,val) wd33c93_read_reg(sc,SBIC_cdb8,val)
415 #define SET_SBIC_cdb9(sc,val) wd33c93_write_reg(sc,SBIC_cdb9,val)
416 #define GET_SBIC_cdb9(sc,val) wd33c93_read_reg(sc,SBIC_cdb9,val)
417 #define SET_SBIC_cdb10(sc,val) wd33c93_write_reg(sc,SBIC_cdb10,val)
418 #define GET_SBIC_cdb10(sc,val) wd33c93_read_reg(sc,SBIC_cdb10,val)
419 #define SET_SBIC_cdb11(sc,val) wd33c93_write_reg(sc,SBIC_cdb11,val)
420 #define GET_SBIC_cdb11(sc,val) wd33c93_read_reg(sc,SBIC_cdb11,val)
421 #define SET_SBIC_cdb12(sc,val) wd33c93_write_reg(sc,SBIC_cdb12,val)
422 #define GET_SBIC_cdb12(sc,val) wd33c93_read_reg(sc,SBIC_cdb12,val)
423 #define SET_SBIC_tlun(sc,val) wd33c93_write_reg(sc,SBIC_tlun,val)
424 #define GET_SBIC_tlun(sc,val) wd33c93_read_reg(sc,SBIC_tlun,val)
425 #define SET_SBIC_cmd_phase(sc,val) wd33c93_write_reg(sc,SBIC_cmd_phase,val)
426 #define GET_SBIC_cmd_phase(sc,val) wd33c93_read_reg(sc,SBIC_cmd_phase,val)
427 #define SET_SBIC_syn(sc,val) wd33c93_write_reg(sc,SBIC_syn,val)
428 #define GET_SBIC_syn(sc,val) wd33c93_read_reg(sc,SBIC_syn,val)
429 #define SET_SBIC_count_hi(sc,val) wd33c93_write_reg(sc,SBIC_count_hi,val)
430 #define GET_SBIC_count_hi(sc,val) wd33c93_read_reg(sc,SBIC_count_hi,val)
431 val) wd33c93_write_reg(sc,SBIC_count_med,val)
432 #define GET_SBIC_count_med(sc,val) wd33c93_read_reg(sc,SBIC_count_med,val)
433 #define SET_SBIC_count_lo(sc,val) wd33c93_write_reg(sc,SBIC_count_lo,val)
434 #define GET_SBIC_count_lo(sc,val) wd33c93_read_reg(sc,SBIC_count_lo,val)
435 #define SET_SBIC_selid(sc,val) wd33c93_write_reg(sc,SBIC_selid,val)
436 #define GET_SBIC_selid(sc,val) wd33c93_read_reg(sc,SBIC_selid,val)
437 #define SET_SBIC_rselid(sc,val) wd33c93_write_reg(sc,SBIC_rselid,val)
438 #define GET_SBIC_rselid(sc,val) wd33c93_read_reg(sc,SBIC_rselid,val)
439 #define SET_SBIC_csr(sc,val) wd33c93_write_reg(sc,SBIC_csr,val)
440 #define GET_SBIC_csr(sc,val) wd33c93_read_reg(sc,SBIC_csr,val)
441 #define SET_SBIC_cmd(sc,val) wd33c93_write_reg(sc,SBIC_cmd,val)
442 #define GET_SBIC_cmd(sc,val) wd33c93_read_reg(sc,SBIC_cmd,val)
443 #define SET_SBIC_data(sc,val) wd33c93_write_reg(sc,SBIC_data,val)
444 #define GET_SBIC_data(sc,val) wd33c93_read_reg(sc,SBIC_data,val)
445 #define SET_SBIC_queue_tag(sc,val) wd33c93_write_reg(sc,SBIC_queue_tag,val)
446 #define GET_SBIC_queue_tag(sc,val) wd33c93_read_reg(sc,SBIC_queue_tag,val)
448 #define SBIC_TC_PUT(sc,val) \
450 wd33c93_write_reg(sc,SBIC_count_hi,((val)>>16)); \
452 (val)>>8); \
454 (val)); \
457 #define SBIC_TC_GET(sc,val) \
459 wd33c93_read_reg(sc,SBIC_count_hi,(val)); \
460 (val) = ((val)<<8) | bus_space_read_1((sc)->sc_regt, \
462 (val) = ((val)<<8) | bus_space_read_1((sc)->sc_regt, \
476 #define GET_SBIC_asr(sc,val) \
478 (val) = bus_space_read_1((sc)->sc_regt,(sc)->sc_asr_regh, 0); \
Indexes created Fri Oct 17 00:09:41 GMT 2025