Lines Matching defs:db_tr
802 struct fwohcidb_tr *db_tr;
842 db_tr = (struct fwohcidb_tr *)(chunk->start);
843 db_tr->dbcnt = 1;
844 err = bus_dmamap_load_mbuf(fc->dmat, db_tr->dma_map,
847 fwohci_execute_db(db_tr, db_tr->dma_map);
851 FWOHCI_DMA_SET(db_tr->db[1].db.desc.cmd,
1223 struct fwohcidb_tr *db_tr;
1307 for (i = 0, db_tr = sc->atrq.top; i < sc->atrq.ndb;
1308 i++, db_tr = STAILQ_NEXT(db_tr, link))
1309 db_tr->xfer = NULL;
1310 for (i = 0, db_tr = sc->atrs.top; i < sc->atrs.ndb;
1311 i++, db_tr = STAILQ_NEXT(db_tr, link))
1312 db_tr->xfer = NULL;
1330 fwohci_execute_db(struct fwohcidb_tr *db_tr, bus_dmamap_t dmamap)
1336 db = &db_tr->db[db_tr->dbcnt];
1343 db_tr->dbcnt++;
1353 struct fwohcidb_tr *db_tr, *kick;
1371 db_tr = dbch->top;
1372 kick = db_tr;
1387 db_tr->xfer = xfer;
1393 ohcifp = (struct fwohci_txpkthdr *) db_tr->db[1].db.immed;
1417 db = db_tr->db;
1434 db_tr->dbcnt = 2;
1435 db = &db_tr->db[db_tr->dbcnt];
1440 err = bus_dmamap_load(sc->fc.dmat, db_tr->dma_map,
1445 err = bus_dmamap_load_mbuf(sc->fc.dmat, db_tr->dma_map,
1468 fwohci_execute_db(db_tr, db_tr->dma_map);
1472 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map,
1473 0, db_tr->dma_map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1475 for (i = 2; i < db_tr->dbcnt; i++)
1476 FWOHCI_DMA_SET(db_tr->db[i].db.desc.cmd,
1480 if (maxdesc < db_tr->dbcnt) {
1481 maxdesc = db_tr->dbcnt;
1486 db = LAST_DB(db_tr);
1490 STAILQ_NEXT(db_tr, link)->bus_addr);
1493 fsegment = db_tr->dbcnt;
1496 FWOHCI_DMA_SET(db->db.desc.depend, db_tr->dbcnt);
1499 dbch->pdb_tr = db_tr;
1500 db_tr = STAILQ_NEXT(db_tr, link);
1501 if (db_tr != dbch->bottom)
1524 dbch->top = db_tr;
1701 struct fwohcidb_tr *db_tr, *last;
1706 for (last = db_tr = STAILQ_FIRST(&dbch->db_trq); db_tr != last;
1707 db_tr = STAILQ_NEXT(db_tr, link)) {
1708 bus_dmamap_destroy(sc->fc.dmat, db_tr->dma_map);
1710 db_tr->buf != NULL) {
1711 fwdma_free(sc->fc.dmat, db_tr->dma_map, db_tr->buf);
1712 db_tr->buf = NULL;
1716 db_tr = STAILQ_FIRST(&dbch->db_trq);
1718 free(db_tr, M_FW);
1728 struct fwohcidb_tr *db_tr, *lastq, *tmpq;
1738 db_tr = (struct fwohcidb_tr *)malloc(db_tr_sz, M_FW, M_WAITOK | M_ZERO);
1739 if (db_tr == NULL) {
1755 free(db_tr, M_FW);
1760 db_tr->idx = idb;
1761 db_tr->dbcnt = 0;
1762 db_tr->db = (struct fwohcidb *)fwdma_v_addr(dbch->am, idb);
1763 db_tr->bus_addr = fwdma_bus_addr(dbch->am, idb);
1768 0, &db_tr->dma_map) != 0) {
1776 db_tr->buf = fwdma_malloc(fc->dev, fc->dmat,
1777 &db_tr
1779 if (db_tr->buf == NULL) {
1787 STAILQ_INSERT_TAIL(&dbch->db_trq, db_tr, link);
1793 bulkxfer->start = (void *)db_tr;
1795 bulkxfer->end = (void *)db_tr;
1797 db_tr++;
1817 struct fwohcidb_tr *db_tr;
1837 db_tr = dbch->top;
1839 fwohci_add_tx_buf(dbch, db_tr, idb);
1840 if (STAILQ_NEXT(db_tr, link) == NULL)
1842 db = db_tr->db;
1843 ldesc = db_tr->dbcnt - 1;
1845 STAILQ_NEXT(db_tr, link)->bus_addr | z);
1856 db_tr = STAILQ_NEXT(db_tr, link);
1866 struct fwohcidb_tr *db_tr;
1883 db_tr = dbch->top;
1884 if (db_tr->dbcnt != 0)
1889 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map,
1890 0, db_tr->dma_map->dm_mapsize, BUS_DMASYNC_PREREAD);
1891 fwohci_add_rx_buf(dbch, db_tr, idb, &sc->dummy_dma);
1892 if (STAILQ_NEXT(db_tr, link) == NULL)
1894 db = db_tr->db;
1895 ldesc = db_tr->dbcnt - 1;
1897 STAILQ_NEXT(db_tr, link)->bus_addr | z);
1905 db_tr = STAILQ_NEXT(db_tr, link);
1907 FWOHCI_DMA_CLEAR(dbch->bottom->db[db_tr->dbcnt - 1].db.desc.depend,
2242 struct fwohcidb_tr *db_tr;
2258 db_tr = (struct fwohcidb_tr *)chunk->end;
2259 stat = FWOHCI_DMA_READ(db_tr->db[ldesc].db.desc.res) >>
2265 bus_dmamap_sync(fc->dmat, db_tr->dma_map, 0,
2266 db_tr->dma_map->dm_mapsize, BUS_DMASYNC_POSTREAD);
2267 bus_dmamap_unload(fc->dmat, db_tr->dma_map);
2428 print_db(struct fwohcidb_tr *db_tr, struct fwohcidb *db, uint32_t ch,
2458 (uintmax_t)db_tr->bus_addr,
2504 struct fwohcidb_tr *db_tr /*, *fdb_tr */;
2517 db_tr = (struct fwohcidb_tr *)(bulkxfer->start);
2520 aprint_normal(sc->fc.dev, "DB %08x %08x %08x\n", bulkxfer, db_tr->bus_addr, fdb_tr->bus_addr);
2523 db = db_tr->db;
2524 fp = (struct fw_pkt *)db_tr->buf;
2543 STAILQ_NEXT(db_tr, link)->bus_addr | dbch->ndesc;
2548 bulkxfer->end = (void *)db_tr;
2549 db_tr = STAILQ_NEXT(db_tr, link);
2560 db_tr = (struct fwohcidb_tr *)bulkxfer->start;
2562 aprint_normal(sc->fc.dev, "DB %08x %3d %08x %08x\n", bulkxfer, bulkxfer->npacket, db_tr->bus_addr, fdb_tr->bus_addr);
2568 fwohci_add_tx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,
2571 struct fwohcidb *db = db_tr->db;
2580 db_tr->buf = fwdma_v_addr(it->buf, poffset);
2581 db_tr->dbcnt = 3;
2600 fwohci_add_rx_buf(struct fwohci_dbch *dbch, struct fwohcidb_tr *db_tr,
2603 struct fwohcidb *db = db_tr->db;
2612 db_tr->dbcnt = 1;
2614 dbuf[0] = db_tr->dma_map->dm_segs[0].ds_addr;
2617 db_tr->dbcnt = 0;
2618 dsiz[db_tr->dbcnt] = sizeof(uint32_t);
2619 dbuf[db_tr->dbcnt++] = dummy_dma->bus_addr;
2620 dsiz[db_tr->dbcnt] = rq->psize;
2622 db_tr->buf = fwdma_v_addr(rq->buf, poffset);
2623 dbuf[db_tr->dbcnt] = fwdma_bus_addr(rq->buf, poffset);
2625 db_tr->dbcnt++;
2627 for (i = 0; i < db_tr->dbcnt; i++) {
2634 ldesc = db_tr->dbcnt - 1;
2729 struct fwohcidb_tr *db_tr, int wake)
2731 struct fwohcidb *db = db_tr->db;
2741 fwdma_sync_multiseg(dbch->am, bdb_tr->idx, db_tr->idx,
2743 dbch->bottom = db_tr;
2752 struct fwohcidb_tr *db_tr;
2770 db_tr = dbch->top;
2772 fwdma_sync_multiseg(dbch->am, db_tr->idx, db_tr->idx,
2774 status = FWOHCI_DMA_READ(db_tr->db[0].db.desc.res) >> OHCI_STATUS_SHIFT;
2775 resCount = FWOHCI_DMA_READ(db_tr->db[0].db.desc.res) & OHCI_COUNT_MASK;
2781 db_tr->bus_addr, status, resCount);
2785 ld = (uint8_t *)db_tr->buf;
2793 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map,
2816 memcpy(p, db_tr->buf, rlen);
2850 dbch->pdb_tr = db_tr;
2878 dbch->pdb_tr = db_tr;
2942 (int)(ld - (uint8_t *)db_tr->buf - plen),
2966 dbch->buf_offset = ld - (uint8_t *)db_tr->buf;
2971 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map, m, n,
2982 fwohci_arcv_free_buf(sc, dbch, db_tr, 1);
2985 if (dbch->pdb_tr != db_tr)
2987 "pdb_tr != db_tr\n");
2988 dbch->top = STAILQ_NEXT(db_tr, link);
2990 db_tr = dbch->top;
2991 fwdma_sync_multiseg(dbch->am, db_tr->idx, db_tr->idx,
2993 status = FWOHCI_DMA_READ(db_tr->db[0].db.desc.res) >>
2995 resCount = FWOHCI_DMA_READ(db_tr->db[0].db.desc.res)
3002 fwdma_sync_multiseg(dbch->am, db_tr->idx, db_tr->idx,
3026 fwohci_arcv_free_buf(sc, dbch, db_tr, 0);
3027 db_tr = STAILQ_NEXT(db_tr, link);
3028 resCount = FWOHCI_DMA_READ(db_tr->db[0].db.desc.res)
3032 dbch->top = db_tr;
3035 fwdma_sync_multiseg(dbch->am, db_tr->idx, db_tr->idx,
3037 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map,
3038 0, db_tr->dma_map->dm_mapsize, BUS_DMASYNC_PREREAD);