Cross Reference: /src/sys/dev/ieee1394/fwohci.c

Lines Matching defs:dmach
349 	sc->arrq.xferq.dmach = -1;
350 	sc->arrs.xferq.dmach = -1;
351 	sc->atrq.xferq.dmach = -1;
352 	sc->atrs.xferq.dmach = -1;
434 		sc->it[i].xferq.dmach = i;
435 		sc->ir[i].xferq.dmach = i;
662 	uint32_t *dmach = (uint32_t *)data;
691 		if (*dmach <= OHCI_MAX_DMA_CH) {
692 			dump_dma(sc, *dmach);
693 			dump_db(sc, *dmach);
798 fwohci_irx_enable(struct firewire_comm *fc, int dmach)
809 	dbch = &sc->ir[dmach];
815 		OWRITE(sc, OHCI_IRMATCH(dmach), tagbit[tag] | ich);
870 	stat = OREAD(sc, OHCI_IRCTL(dmach));
874 		OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN);
880 	OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach);
881 	OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach);
882 	OWRITE(sc, OHCI_IR_MASK, 1 << dmach);
883 	OWRITE(sc, OHCI_IRCTLCLR(dmach), 0xf0000000);
884 	OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_ISOHDR);
885 	OWRITE(sc, OHCI_IRCMD(dmach),
887 	OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_DMA_RUN);
890 	dump_db(sc, IRX_CH + dmach);
896 fwohci_irx_disable(struct firewire_comm *fc, int dmach)
900 	OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN);
901 	OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach);
902 	OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach);
905 	fwohci_db_free(sc, &sc->ir[dmach]);
906 	sc->ir[dmach].xferq.flag &= ~FWXFERQ_RUNNING;
912 fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach)
921 	dbch = &sc->it[dmach];
945 		fwohci_txbufdb(sc, dmach, chunk);
967 	stat = OREAD(sc, OHCI_ITCTL(dmach));
975 	OWRITE(sc, OHCI_ITCTLCLR(dmach), OHCI_CNTL_DMA_RUN);
977 	OWRITE(sc, OHCI_IT_MASKCLR, 1 << dmach);
978 	OWRITE(sc, OHCI_IT_STATCLR, 1 << dmach);
979 	OWRITE(sc, OHCI_IT_MASK, 1 << dmach);
983 	OWRITE(sc, OHCI_ITCMD(dmach),
988 		dump_dma(sc, ITX_CH + dmach);
999 		OWRITE(sc, OHCI_ITCTLCLR(dmach), 0xffff0000);
1005 		OWRITE(sc, OHCI_ITCTL(dmach),
1009 		OWRITE(sc, OHCI_ITCTL(dmach), OHCI_CNTL_DMA_RUN);
1014 			dump_dma(sc, ITX_CH + dmach);
1015 			dump_db(sc, ITX_CH + dmach);
1019 		OWRITE(sc, OHCI_ITCTL(dmach), OHCI_CNTL_DMA_WAKE);
1026 fwohci_itx_disable(struct firewire_comm *fc, int dmach)
1030 	OWRITE(sc, OHCI_ITCTLCLR(dmach),
1032 	OWRITE(sc, OHCI_IT_MASKCLR, 1 << dmach);
1033 	OWRITE(sc, OHCI_IT_STATCLR, 1 << dmach);
1036 	fwohci_db_free(sc, &sc->it[dmach]);
1037 	sc->it[dmach].xferq.flag &= ~FWXFERQ_RUNNING;
1816 	int idb, z, i, dmach = 0, ldesc;
1825 	for (dmach = 0; dmach < sc->fc.nisodma; dmach++)
1826 		if (dbch->off == sc->it[dmach].off)
1828 	if (dmach == sc->fc.nisodma) {
2186 fwohci_tbuf_update(struct fwohci_softc *sc, int dmach)
2198 	it = fc->it[dmach];
2199 	ldesc = sc->it[dmach].ndesc - 1;
2201 	fwdma_sync_multiseg_all(sc->it[dmach].am, BUS_DMASYNC_POSTREAD);
2203 		dump_db(sc, ITX_CH + dmach);
2239 fwohci_rbuf_update(struct fwohci_softc *sc, int dmach)
2248 	ir = fc->ir[dmach];
2249 	ldesc = sc->ir[dmach].ndesc - 1;
2252 	dump_db(sc, dmach);
2256 	fwdma_sync_multiseg_all(sc->ir[dmach].am, BUS_DMASYNC_POSTREAD);
2502 fwohci_txbufdb(struct fwohci_softc *sc, int dmach, struct fw_bulkxfer *bulkxfer)
2514 	dbch = &sc->it[dmach];
2515 	chtag = sc->it[dmach].xferq.flag & 0xff;
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