Lines Matching refs:fc
171 static void fwohci_timeout(struct firewire_comm *fc);
329 sc->fc.arq = &sc->arrq.xferq;
330 sc->fc.ars = &sc->arrs.xferq;
331 sc->fc.atq = &sc->atrq.xferq;
332 sc->fc.ats = &sc->atrs.xferq;
369 sc->fc.tcode = tinfo;
371 sc->fc.cyctimer = fwohci_cyctimer;
372 sc->fc.ibr = fwohci_ibr;
373 sc->fc.set_bmr = fwohci_set_bus_manager;
374 sc->fc.ioctl = fwohci_ioctl;
375 sc->fc.irx_enable = fwohci_irx_enable;
376 sc->fc.irx_disable = fwohci_irx_disable;
378 sc->fc.itx_enable = fwohci_itxbuf_enable;
379 sc->fc.itx_disable = fwohci_itx_disable;
380 sc->fc.timeout = fwohci_timeout;
381 sc->fc.set_intr = fwohci_set_intr;
383 sc->fc.irx_post = fwohci_irx_post;
385 sc->fc.irx_post = NULL;
387 sc->fc.itx_post = NULL;
391 fw_init(&sc->fc);
409 aprint_normal_dev(sc->fc.dev, "OHCI version %x.%x (ROM=%d)\n",
412 aprint_error_dev(sc->fc.dev, "invalid OHCI version\n");
425 sc->fc.nisodma = i;
426 aprint_normal_dev(sc->fc.dev, "No. of Isochronous channels is %d.\n",
431 for (i = 0; i < sc->fc.nisodma; i++) {
432 sc->fc.it[i] = &sc->it[i].xferq;
433 sc->fc.ir[i] = &sc->ir[i].xferq;
442 fw_init_isodma(&sc->fc);
444 sc->fc.config_rom = fwdma_alloc_setup(sc->fc.dev, sc->fc.dmat,
446 if (sc->fc.config_rom == NULL) {
447 aprint_error_dev(sc->fc.dev, "config_rom alloc failed.\n");
452 memset(sc->fc.config_rom, 0, CROMSIZE);
453 sc->fc.config_rom[1] = 0x31333934;
454 sc->fc.config_rom[2] = 0xf000a002;
455 sc->fc.config_rom[3] = OREAD(sc, OHCI_EUID_HI);
456 sc->fc.config_rom[4] = OREAD(sc, OHCI_EUID_LO);
457 sc->fc.config_rom[5] = 0;
458 sc->fc.config_rom[0] = (4 << 24) | (5 << 16);
460 sc->fc.config_rom[0] |= fw_crc16(&sc->fc.config_rom[1], 5*4);
465 sc->sid_buf = fwdma_alloc_setup(sc->fc.dev, sc->fc.dmat, OHCI_SIDSIZE,
468 aprint_error_dev(sc->fc.dev, "sid_buf alloc failed.");
472 fwdma_alloc_setup(sc->fc.dev, sc->fc.dmat, sizeof(uint32_t),
475 aprint_error_dev(sc->fc.dev, "dummy_dma alloc failed.");
495 sc->fc.eui.hi = OREAD(sc, FWOHCIGUID_H);
496 sc->fc.eui.lo = OREAD(sc, FWOHCIGUID_L);
498 ui[i] = FW_EUI64_BYTE(&sc->fc.eui, i);
499 aprint_normal_dev(sc->fc.dev,
505 fc.bdev =
506 config_found(sc->fc.dev, __UNCONST("ieee1394if"), fwohci_print,
517 if (sc->fc.bdev != NULL) {
518 rv = config_detach(sc->fc.bdev, flags);
525 if (sc->fc.config_rom != NULL)
533 for (i = 0; i < sc->fc.nisodma; i++) {
538 fw_destroy_isodma(&sc->fc);
539 fw_destroy(&sc->fc);
550 if (!device_is_active(sc->fc.dev))
559 aprint_error_dev(sc->fc.dev, "device physically ejected?\n");
595 for (i = 0; i < sc->fc.nisodma; i++) {
598 aprint_normal_dev(sc->fc.dev,
606 sc->fc.irx_enable(&sc->fc, i);
610 firewire_resume(&sc->fc);
611 sc->fc.ibr(&sc->fc);
620 fwohci_set_intr(&sc->fc, 0);
628 for (i = 0; i < sc->fc.nisodma; i++) {
734 fwohci_cyctimer(struct firewire_comm *fc)
736 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
742 fwohci_set_bus_manager(struct firewire_comm *fc, u_int node)
744 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
768 fwohci_ibr(struct firewire_comm *fc)
770 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
773 aprint_normal_dev(fc->dev, "Initiate bus reset\n");
779 OWRITE(sc, OHCI_CROMHDR, ntohl(sc->fc.config_rom[0]));
780 OWRITE(sc, OHCI_BUS_OPT, ntohl(sc->fc.config_rom[2]));
798 fwohci_irx_enable(struct firewire_comm *fc, int dmach)
800 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
830 aprint_error_dev(fc->dev, "IR DMA no free chunk\n");
844 err = bus_dmamap_load_mbuf(fc->dmat, db_tr->dma_map,
849 aprint_error_dev(fc->dev,
875 aprint_error_dev(fc->dev, "IR DMA overrun (0x%08x)\n", stat);
896 fwohci_irx_disable(struct firewire_comm *fc, int dmach)
898 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
912 fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach)
914 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1002 cycle_now = (fc->cyctimer(fc) >> 12) & 0x7fff;
1018 aprint_error_dev(fc->dev, "IT DMA underrun (0x%08x)\n", stat);
1026 fwohci_itx_disable(struct firewire_comm *fc, int dmach)
1028 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1042 fwohci_timeout(struct firewire_comm *fc)
1045 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1052 fwohci_irx_post (struct firewire_comm *fc, uint32_t *qld)
1061 fwohci_set_intr(struct firewire_comm *fc, int enable)
1063 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1118 aprint_error_dev(sc->fc.dev,
1160 sc->fc.mode &= ~FWPHYASYST;
1161 sc->fc.nport = reg & FW_PHY_NP;
1162 sc->fc.speed = reg & FW_PHY_SPD >> 6;
1163 if (sc->fc.speed > MAX_SPEED) {
1164 aprint_error_dev(sc->fc.dev,
1166 sc->fc.speed, MAX_SPEED);
1167 sc->fc.speed = MAX_SPEED;
1169 aprint_normal_dev(sc->fc.dev, "Phy 1394 only %s, %d ports.\n",
1170 fw_linkspeed[sc->fc.speed], sc->fc.nport);
1173 sc->fc.mode |= FWPHYASYST;
1174 sc->fc
1175 sc->fc.speed = (reg2 & FW_PHY_ESPD) >> 5;
1176 if (sc->fc.speed > MAX_SPEED) {
1177 aprint_error_dev(sc->fc.dev,
1179 sc->fc.speed, MAX_SPEED);
1180 sc->fc.speed = MAX_SPEED;
1182 aprint_normal_dev(sc->fc.dev,
1184 fw_linkspeed[sc->fc.speed], sc->fc.nport);
1237 for (i = 0; i < sc->fc.nisodma; i++) {
1263 aprint_normal_dev(sc->fc.dev, "Link %s, max_rec %d bytes.\n",
1266 sc->fc.maxrec = sc->fc.speed + 8;
1267 if (max_rec != sc->fc.maxrec) {
1268 reg2 = (reg2 & 0xffff0fff) | (sc->fc.maxrec << 12);
1269 aprint_normal_dev(sc->fc.dev, "max_rec %d -> %d\n",
1270 MAXREC(max_rec), MAXREC(sc->fc.maxrec));
1277 OWRITE(sc, OHCI_CROMHDR, sc->fc.config_rom[0]);
1323 fwohci_set_intr(&sc->fc, 1);
1384 aprint_error_dev(sc->fc.dev, "TX queue empty\n");
1440 err = bus_dmamap_load(sc->fc.dmat, db_tr->dma_map,
1445 err = bus_dmamap_load_mbuf(sc->fc.dmat, db_tr->dma_map,
1463 aprint_error_dev(sc->fc.dev,
1470 aprint_error_dev(sc->fc.dev,
1472 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map,
1504 aprint_error_dev(sc->fc.dev, "fwohci_start: lack of db_trq\n");
1529 fwohci_start_atq(struct firewire_comm *fc)
1531 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1541 fwohci_start_ats(struct firewire_comm *fc)
1543 struct fwohci_softc *sc = (struct fwohci_softc *)fc;
1555 struct firewire_comm *fc = &sc->fc;
1580 if (fc->status != FWBUSINIT)
1583 bus_dmamap_sync(fc->dmat, tr->dma_map,
1585 bus_dmamap_unload(fc->dmat, tr->dma_map);
1595 aprint_error_dev(fc->dev, "force reset AT FIFO\n");
1614 aprint_error_dev(fc->dev, "txd err=%2x %s\n", stat,
1621 aprint_error_dev(fc->dev, "txd err=%2x %s\n", stat,
1637 aprint_error_dev(fc->dev, "txd err=%2x %s\n", stat,
1676 aprint_error_dev(fc->dev, "this shouldn't happen\n");
1691 aprint_normal_dev(fc->dev, "make free slot\n");
1708 bus_dmamap_destroy(sc->fc.dmat, db_tr->dma_map);
1711 fwdma_free(sc->fc.dmat, db_tr->dma_map, db_tr->buf);
1727 struct firewire_comm *fc = &sc->fc;
1740 aprint_error_dev(fc->dev, "malloc(1) failed\n");
1745 dbch->am = fwdma_malloc_multiseg(fc, DB_SIZE(dbch), DB_SIZE(dbch),
1754 aprint_error_dev(fc->dev, "fwdma_malloc_multiseg failed\n");
1766 if (bus_dmamap_create(fc->dmat, dbch->xferq.psize,
1769 aprint_error_dev(fc->dev, "bus_dmamap_create failed\n");
1776 db_tr->buf = fwdma_malloc(fc->dev, fc->dmat,
1780 aprint_error_dev(fc->dev,
1825 for (dmach = 0; dmach < sc->fc.nisodma; dmach++)
1828 if (dmach == sc->fc.nisodma) {
1889 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map,
1960 device_xname(fc->dev),
1990 struct firewire_comm *fc = &sc->fc;
1993 if ((stat & OHCI_INT_PHY_BUS_R) && (fc->status != FWBUSRESET)) {
1994 fc->status = FWBUSRESET;
1998 aprint_normal_dev(fc->dev, "BUS reset\n");
2007 fw_busreset(&sc->fc, FWBUSRESET);
2008 OWRITE(sc, OHCI_CROMHDR, ntohl(sc->fc.config_rom[0]));
2009 OWRITE(sc, OHCI_BUS_OPT, ntohl(sc->fc.config_rom[2]));
2035 fc->nodeid = node_id & 0x3f;
2036 aprint_normal_dev(fc->dev, "node_id=0x%08x, gen=%d, ",
2039 aprint_error_dev(fc->dev, "Bus reset failure\n");
2056 fc->status = FWBUSINIT;
2068 struct firewire_comm *fc = &sc->fc;
2074 for (i = 0; i < fc->nisodma; i++)
2079 aprint_error_dev(fc->dev,
2088 for (i = 0; i < fc->nisodma; i++)
2115 aprint_error_dev(fc->dev, "too many cycle lost, "
2124 aprint_error_dev(fc->dev, "posted write error\n");
2126 aprint_error_dev(fc->dev, "unrecoverable error\n");
2128 aprint_normal_dev(fc->dev, "phy int\n");
2136 struct firewire_comm *fc = &sc->fc;
2143 aprint_error_dev(fc->dev, "SID Error\n");
2148 aprint_error_dev(fc->dev, "invalid SID len = %d\n", plen);
2154 aprint_error_dev(fc->dev, "malloc failed\n");
2165 fw_drain_txq(fc);
2167 fw_sidrcv(fc, buf, plen);
2188 struct firewire_comm *fc = &sc->fc;
2198 it = fc->it[dmach];
2200 mutex_enter(&fc->fc_mtx);
2226 aprint_error_dev(fc->dev,
2235 mutex_exit(&fc->fc_mtx);
2241 struct firewire_comm *fc = &sc->fc;
2248 ir = fc->ir[dmach];
2255 mutex_enter(&fc->fc_mtx);
2265 bus_dmamap_sync(fc->dmat, db_tr->dma_map, 0,
2267 bus_dmamap_unload(fc->dmat, db_tr->dma_map);
2273 aprint_error_dev(fc->dev,
2284 aprint_error_dev(fc->dev,
2293 mutex_exit(&fc->fc_mtx);
2323 aprint_normal_dev(sc->fc.dev,
2331 aprint_normal_dev(sc->fc.dev, "dma %d ch:%s%s%s%s%s%s %s(%x)\n",
2343 aprint_normal_dev(sc->fc.dev, "dma %d ch: Nostat\n", ch);
2374 aprint_error_dev(sc->fc.dev, "No DB is attached ch=%d\n", ch);
2512 KASSERT(mutex_owned(&sc->fc.fc_mtx));
2520 aprint_normal(sc->fc.dev, "DB %08x %08x %08x\n", bulkxfer, db_tr->bus_addr, fdb_tr->bus_addr);
2562 aprint_normal(sc->fc.dev, "DB %08x %3d %08x %08x\n", bulkxfer, bulkxfer->npacket, db_tr->bus_addr, fdb_tr->bus_addr);
2713 aprint_error_dev(sc->fc.dev, "Unknown tcode %d\n",
2719 aprint_error_dev(sc->fc.dev, "Invalid packet length %d\n", r);
2779 aprint_normal_dev(sc->fc.dev,
2793 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map,
2822 aprint_error_dev(sc->fc.dev,
2854 aprint_error_dev(sc->fc.dev,
2870 aprint_error_dev(sc->fc.dev,
2883 aprint_error_dev(sc->fc.dev,
2897 aprint_error_dev(sc->fc.dev, "nvec == 0\n");
2910 aprint_normal(sc->fc.dev,
2923 rb.fc = &sc->fc;
2931 if ((sc->fc.status != FWBUSRESET) &&
2932 (sc->fc.status != FWBUSINIT))
2933 aprint_error_dev(sc->fc.dev,
2937 aprint_error_dev(sc->fc.dev,
2952 bus_dmamap_sync(sc->fc.dmat,
2958 bus_dmamap_sync(sc->fc.dmat,
2971 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map, m, n,
2986 aprint_error_dev(sc->fc.dev,
3008 aprint_error_dev(sc->fc.dev, "AR DMA status=%x, ",
3012 bus_dmamap_sync(sc->fc.dmat, dbch->pdb_tr->dma_map,
3016 bus_dmamap_sync(sc->fc.dmat, dbch->pdb_tr->dma_map,
3037 bus_dmamap_sync(sc->fc.dmat, db_tr->dma_map,
Indexes created Tue Oct 14 11:09:46 GMT 2025