Lines Matching defs:gt_read
76 #define gt_read(sc,r) bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (r))
252 gt->sc_model = PCI_PRODUCT(gt_read(gt, GTPCI_CD(0)));
254 gt->sc_rev = PCI_REVISION(gt_read(gt, GTPCI_CD(0)));
279 cpumode = gt_read(gt, GT_CPU_Mode);
293 cpumstr = gt_read(gt, GT_CPU_Master_Ctl);
302 gt_read(gt, GT_WDOG_Config), gt_read(gt, GT_WDOG_Value));
305 loaddr = GT_LADDR_GET(gt_read(gt, GT_SCS0_Low_Decode), gt->sc_model);
306 hiaddr = GT_HADDR_GET(gt_read(gt, GT_SCS0_High_Decode), gt->sc_model);
310 loaddr = GT_LADDR_GET(gt_read(gt, GT_SCS1_Low_Decode), gt->sc_model);
311 hiaddr = GT_HADDR_GET(gt_read(gt, GT_SCS1_High_Decode), gt->sc_model);
315 loaddr = GT_LADDR_GET(gt_read(gt, GT_SCS2_Low_Decode), gt->sc_model);
316 hiaddr = GT_HADDR_GET(gt_read(gt, GT_SCS2_High_Decode), gt->sc_model);
320 loaddr = GT_LADDR_GET(gt_read(gt, GT_SCS3_Low_Decode), gt->sc_model);
321 hiaddr = GT_HADDR_GET(gt_read(gt, GT_SCS3_High_Decode), gt->sc_model);
325 loaddr = GT_LADDR_GET(gt_read(gt, GT_CS0_Low_Decode), gt->sc_model);
326 hiaddr = GT_HADDR_GET(gt_read(gt, GT_CS0_High_Decode), gt->sc_model);
330 loaddr = GT_LADDR_GET(gt_read(gt, GT_CS1_Low_Decode), gt->sc_model);
331 hiaddr = GT_HADDR_GET(gt_read(gt, GT_CS1_High_Decode), gt->sc_model);
335 loaddr = GT_LADDR_GET(gt_read(gt, GT_CS2_Low_Decode), gt->sc_model);
336 hiaddr = GT_HADDR_GET(gt_read(gt, GT_CS2_High_Decode), gt->sc_model);
340 loaddr = GT_LADDR_GET(gt_read(gt, GT_CS3_Low_Decode), gt->sc_model);
341 hiaddr = GT_HADDR_GET(gt_read(gt, GT_CS3_High_Decode), gt->sc_model);
345 loaddr = GT_LADDR_GET(gt_read(gt, GT_BootCS_Low_Decode), gt->sc_model);
346 hiaddr = GT_HADDR_GET(gt_read(gt, GT_BootCS_High_Decode), gt->sc_model);
350 loaddr = GT_LADDR_GET(gt_read(gt, GT_PCI0_IO_Low_Decode), gt->sc_model);
352 GT_HADDR_GET(gt_read(gt, GT_PCI0_IO_High_Decode), gt->sc_model);
356 loaddr = gt_read(gt, GT_PCI0_IO_Remap);
360 GT_LADDR_GET(gt_read(gt, GT_PCI0_Mem0_Low_Decode), gt->sc_model);
362 GT_HADDR_GET(gt_read(gt, GT_PCI0_Mem0_High_Decode), gt->sc_model);
366 loaddr = gt_read(gt, GT_PCI0_Mem0_Remap_Low);
367 hiaddr = gt_read(gt, GT_PCI0_Mem0_Remap_High);
371 GT_LADDR_GET(gt_read(gt, GT_PCI0_Mem1_Low_Decode), gt->sc_model);
373 GT_HADDR_GET(gt_read(gt, GT_PCI0_Mem1_High_Decode), gt->sc_model);
377 loaddr = gt_read(gt, GT_PCI0_Mem1_Remap_Low);
378 hiaddr = gt_read(gt, GT_PCI0_Mem1_Remap_High);
382 GT_LADDR_GET(gt_read(gt, GT_PCI0_Mem2_Low_Decode), gt->sc_model);
384 GT_HADDR_GET(gt_read(gt, GT_PCI0_Mem2_High_Decode), gt->sc_model);
388 loaddr = gt_read(gt, GT_PCI0_Mem2_Remap_Low);
389 hiaddr = gt_read(gt, GT_PCI0_Mem2_Remap_High);
393 GT_LADDR_GET(gt_read(gt, GT_PCI0_Mem3_Low_Decode), gt->sc_model);
395 GT_HADDR_GET(gt_read(gt, GT_PCI0_Mem3_High_Decode), gt->sc_model);
399 loaddr = gt_read(gt, GT_PCI0_Mem3_Remap_Low);
400 hiaddr = gt_read(gt, GT_PCI0_Mem3_Remap_High);
403 loaddr = GT_LADDR_GET(gt_read(gt, GT_PCI1_IO_Low_Decode), gt->sc_model);
405 GT_HADDR_GET(gt_read(gt, GT_PCI1_IO_High_Decode), gt->sc_model);
409 loaddr = gt_read(gt, GT_PCI1_IO_Remap);
413 GT_LADDR_GET(gt_read(gt, GT_PCI1_Mem0_Low_Decode), gt->sc_model);
415 GT_HADDR_GET(gt_read(gt, GT_PCI1_Mem0_High_Decode), gt->sc_model);
419 loaddr = gt_read(gt, GT_PCI1_Mem0_Remap_Low);
420 hiaddr = gt_read(gt, GT_PCI1_Mem0_Remap_High);
424 GT_LADDR_GET(gt_read(gt, GT_PCI1_Mem1_Low_Decode), gt->sc_model);
426 GT_HADDR_GET(gt_read(gt, GT_PCI1_Mem1_High_Decode), gt->sc_model);
430 loaddr = gt_read(gt, GT_PCI1_Mem1_Remap_Low);
431 hiaddr = gt_read(gt, GT_PCI1_Mem1_Remap_High);
435 GT_LADDR_GET(gt_read(gt, GT_PCI1_Mem2_Low_Decode), gt->sc_model);
437 GT_HADDR_GET(gt_read(gt, GT_PCI1_Mem2_High_Decode), gt->sc_model);
441 loaddr = gt_read(gt, GT_PCI1_Mem2_Remap_Low);
442 hiaddr = gt_read(gt, GT_PCI1_Mem2_Remap_High);
446 GT_LADDR_GET(gt_read(gt, GT_PCI1_Mem3_Low_Decode), gt->sc_model);
448 GT_HADDR_GET(gt_read(gt, GT_PCI1_Mem3_High_Decode), gt->sc_model);
452 loaddr = gt_read(gt, GT_PCI1_Mem3_Remap_Low);
453 hiaddr = gt_read(gt, GT_PCI1_Mem3_Remap_High);
456 loaddr = GT_LADDR_GET(gt_read(gt, GT_Internal_Decode), gt->sc_model);
460 loaddr = GT_LADDR_GET(gt_read(gt, GT_CPU0_Low_Decode), gt->sc_model);
461 hiaddr = GT_HADDR_GET(gt_read(gt, GT_CPU0_High_Decode), gt->sc_model);
466 loaddr = GT_LADDR_GET(gt_read(gt, GT_CPU1_Low_Decode), gt->sc_model);
467 hiaddr = GT_HADDR_GET(gt_read(gt, GT_CPU1_High_Decode), gt->sc_model);
475 cpucfg = gt_read(gt, GT_CPU_Cfg);
527 cause = gt_read(gt, GT_DEVBUS_ICAUSE);
528 addr = gt_read(gt, GT_DEVBUS_ERR_ADDR);
557 (void)gt_read(gt, GT_DEVBUS_ERR_ADDR); /* clear addr */
579 count = gt_read(gt, GT_ECC_Count);
580 dlo = gt_read(gt, GT_ECC_Data_Lo);
581 dhi = gt_read(gt, GT_ECC_Data_Hi);
582 rec = gt_read(gt, GT_ECC_Rec);
583 calc = gt_read(gt, GT_ECC_Calc);
584 addr = gt_read(gt, GT_ECC_Addr); /* read last! */
607 ctl = gt_read(gt, GT_ECC_Ctl);
610 (void)gt_read(gt, GT_ECC_Data_Lo);
611 (void)gt_read(gt, GT_ECC_Data_Hi);
612 (void)gt_read(gt, GT_ECC_Rec);
613 (void)gt_read(gt, GT_ECC_Calc);
614 (void)gt_read(gt, GT_ECC_Addr); /* read last! */
663 cause = gt_read(gt, GT_CommUnitIntr_Cause);
665 addr = gt_read(gt, GT_CommUnitIntr_ErrAddr);
701 cause = gt_read(gt, GT_CommUnitIntr_Cause);
705 (void)gt_read(gt, GT_CommUnitIntr_ErrAddr);
724 r = gt_read(gt, GT_WDOG_Config);
725 aprint_normal(" status %#x,%#x:", r, gt_read(gt, GT_WDOG_Value));
764 r = gt_read(gt, GT_WDOG_Config);
799 r = gt_read(gt, regoff);
810 r = gt_read(gt, GT_WDOG_Config);
812 r, gt_read(gt, GT_WDOG_Value),
879 r = gt_read(gt, GT_WDOG_Config);
929 *base = gt_read(sc, tagtbl[i].basereg) <<
932 const uint32_t s = gt_read(sc, tagtbl[i].sizereg);
Indexes created Mon Sep 29 03:10:08 GMT 2025