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Lines Matching refs:sc_atac

90 	sc->sc_wdcdev.sc_atac.atac_dev = self;
123 	aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
127 	sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
129 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
131 			sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_UDMA;
133 				sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
135 				sc->sc_wdcdev.sc_atac.atac_udma_cap = 5;
137 				sc->sc_wdcdev.sc_atac.atac_udma_cap = 4;
139 				sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;
144 			aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
150 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
151 	sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
152 	sc->sc_wdcdev.sc_atac.atac_set_modes = acer_setup_channel;
153 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
154 	sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS;
178 	if (device_getprop_bool(sc->sc_wdcdev.sc_atac.atac_dev,
206 			aprint_error_dev(sc->sc_wdcdev.sc_atac.atac_dev,
212 	for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
218 			aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev,
366 	for (i = 0; i < sc->sc_wdcdev.sc_atac.atac_nchannels; i++) {
377 				      sc->sc_wdcdev.sc_atac.atac_dev), i);