Lines Matching refs:asc
203 struct agp_amd64_softc *asc;
211 asc = malloc(sizeof(struct agp_amd64_softc), M_AGP, M_WAITOK | M_ZERO);
226 asc->mctrl_tag[n] = tag;
235 asc->n_mctrl = n;
238 asc->n_mctrl);
241 sc->as_chipc = asc;
245 asc->initial_aperture = AGP_GET_APERTURE(sc);
261 asc->gatt = gatt;
266 if (agp_amd64_uli_set_aperture(sc, asc->initial_aperture)) {
274 asc->ctrl_tag = AGP_AMD64_NVIDIA_PCITAG(pa->pa_pc);
276 if (agp_amd64_nvidia_set_aperture(sc, asc->initial_aperture)) {
284 asc->via_agp = agp_amd64_via_match(pa);
285 if (asc->via_agp) {
286 asc->ctrl_tag = AGP_AMD64_VIA_PCITAG(pa->pa_pc);
289 asc->initial_aperture)) {
300 for (i = 0; i < asc->n_mctrl; i++) {
301 pci_conf_write(pa->pa_pc, asc->mctrl_tag[i], AGP_AMD64_ATTBASE,
303 apctrl = pci_conf_read(pa->pa_pc, asc->mctrl_tag[i],
308 pci_conf_write(pa->pa_pc, asc->mctrl_tag[i], AGP_AMD64_APCTRL,
318 fail1: free(asc, M_AGP);
341 struct agp_amd64_softc *asc = sc->as_chipc;
344 i = (pci_conf_read(sc->as_pc, asc->mctrl_tag[0], AGP_AMD64_APCTRL) &
356 struct agp_amd64_softc *asc = sc->as_chipc;
367 for (j = 0; j < asc->n_mctrl; j++) {
368 apctrl = pci_conf_read(sc->as_pc, asc->mctrl_tag[0],
370 pci_conf_write(sc->as_pc, asc->mctrl_tag[0], AGP_AMD64_APCTRL,
384 if (asc->via_agp)
395 struct agp_amd64_softc *asc = sc->as_chipc;
397 if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
400 asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] =
409 struct agp_amd64_softc *asc = sc->as_chipc;
411 if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
414 asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
422 struct agp_amd64_softc *asc = sc->as_chipc;
426 for (i = 0; i < asc->n_mctrl; i++) {
427 cachectrl = pci_conf_read(sc->as_pc, asc->mctrl_tag[i],
429 pci_conf_write(sc->as_pc, asc->mctrl_tag[i],
438 struct agp_amd64_softc *asc = sc->as_chipc;
443 asc->apbase = PCI_MAPREG_MEM_ADDR(apbase);
444 apbase = (asc->apbase >> 25) & AGP_AMD64_APBASE_MASK;
445 for (i = 0; i < asc->n_mctrl; i++)
446 pci_conf_write(sc->as_pc, asc->mctrl_tag[i], AGP_AMD64_APBASE,
453 struct agp_amd64_softc *asc = sc->as_chipc;
459 (apbase & 0x0000000f) | asc->apbase);
461 asc->apbase);
467 struct agp_amd64_softc *asc = sc->as_chipc;
480 asc->apbase + aperture - 1);
488 struct agp_amd64_softc *asc = sc->as_chipc;
495 (apbase & 0x0000000f) | asc->apbase);
496 pci_conf_write(sc->as_pc, asc->ctrl_tag, AGP_AMD64_NVIDIA_1_APBASE1,
497 asc->apbase);
498 pci_conf_write(sc->as_pc, asc->ctrl_tag, AGP_AMD64_NVIDIA_1_APBASE2,
499 asc->apbase);
505 struct agp_amd64_softc *asc = sc->as_chipc;
518 pci_conf_write(sc->as_pc, asc->ctrl_tag, AGP_AMD64_NVIDIA_1_APSIZE,
519 (pci_conf_read(sc->as_pc, asc->ctrl_tag,
521 pci_conf_write(sc->as_pc, asc->ctrl_tag, AGP_AMD64_NVIDIA_1_APLIMIT1,
522 asc->apbase + aperture - 1);
523 pci_conf_write(sc->as_pc, asc->ctrl_tag, AGP_AMD64_NVIDIA_1_APLIMIT2,
524 asc->apbase + aperture - 1);
532 struct agp_amd64_softc *asc = sc->as_chipc;
535 pci_conf_write(sc->as_pc, asc->ctrl_tag, AGP3_VIA_ATTBASE,
536 asc->gatt->ag_physical);
537 pci_conf_write(sc->as_pc, asc->ctrl_tag, AGP3_VIA_GARTCTRL,
538 pci_conf_read(sc->as_pc, asc->ctrl_tag, AGP3_VIA_ATTBASE) | 0x180);
544 struct agp_amd64_softc *asc = sc->as_chipc;
550 pci_conf_write(sc->as_pc, asc->ctrl_tag, AGP3_VIA_APSIZE,
551 (pci_conf_read(sc->as_pc, asc->ctrl_tag, AGP3_VIA_APSIZE) & ~0xff) |