Cross Reference: /src/sys/dev/pci/cs4281reg.h

Lines Matching refs:FIFO
138 #define CS4281_FCR0    0x180 /* FIFO Control Register 0 */
139 #define CS4281_FCR1    0x184 /* FIFO Control Register 1 */
140 #define CS4281_FCR2    0x188 /* FIFO Control Register 2 */
141 #define CS4281_FCR3    0x18C /* FIFO Control Register 3 */
146 #define CS4281_FPDR0   0x190 /* FIFO Polled Data Register 0 */
147 #define CS4281_FPDR1   0x194 /* FIFO Polled Data Register 1 */
148 #define CS4281_FPDR2   0x198 /* FIFO Polled Data Register 2 */
149 #define CS4281_FPDR3   0x19C /* FIFO Polled Data Register 3 */
150 #define CS4281_FCHS    0x20C /* FIFO Channel Status */
151 #define CS4281_FSIC0   0x210 /* FIFO Status and Interrupt Control Register 0 */
152 #define CS4281_FSIC1   0x214 /* FIFO Status and Interrupt Control Register 1 */
153 #define CS4281_FSIC2   0x218 /* FIFO Status and Interrupt Control Register 2 */
154 #define CS4281_FSIC3   0x21C /* FIFO Status and Interrupt Control Register 3 */
273 0000h - 03FFh	 FIFO RAM    Audio Sample RAM Memory Block - FIFOs
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