Cross Reference: /src/sys/dev/pci/cxgb/cxgb

Lines Matching refs:phy
51 static void ael100x_txon(struct cphy *phy)
53     int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;
56     t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio);
60 static int ael1002_power_down(struct cphy *phy, int enable)
64     err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable);
66         err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
71 static int ael1002_reset(struct cphy *phy, int wait)
75     if ((err = ael1002_power_down(phy, 0)) ||
76         (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) ||
77         (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) ||
78         (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) ||
79         (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) ||
80         (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN,
86 static int ael1002_intr_noop(struct cphy *phy)
91 static int ael100x_get_link_status(struct cphy *phy, int *link_ok,
96         int err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &status);
103             err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR,
144 void t3_ael1002_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
147     cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops);
148     ael100x_txon(phy);
151 static int ael1006_reset(struct cphy *phy, int wait)
153     return t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);
156 static int ael1006_intr_enable(struct cphy *phy)
158     return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1);
161 static int ael1006_intr_disable(struct cphy *phy)
163     return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0);
166 static int ael1006_intr_clear(struct cphy *phy)
170     return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val);
173 static int ael1006_intr_handler(struct cphy *phy)
176     int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &status);
183 static int ael1006_power_down(struct cphy *phy, int enable)
185     return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
217 void t3_ael1006_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
220     cphy_init(phy, adapter, phy_addr, &ael1006_ops, mdio_ops);
221     ael100x_txon(phy);
252 void t3_qt2045_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
257     cphy_init(phy, adapter, phy_addr, &qt2045_ops, mdio_ops);
263     if (!phy_addr && !mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &stat) &&
265         phy->addr = 1;
268 static int xaui_direct_reset(struct cphy *phy, int wait)
273 static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok,
279         status = t3_read_reg(phy->adapter,
280                      XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |
281              t3_read_reg(phy->adapter,
282                      XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |
283              t3_read_reg(phy->adapter,
284                      XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |
285              t3_read_reg(phy->adapter,
286                      XGM_REG(A_XGM_SERDES_STAT3, phy->addr));
296 static int xaui_direct_power_down(struct cphy *phy, int enable)
329 void t3_xaui_direct_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
332     cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops);