Lines Matching defs:adap
146 adapter_t *adap = mc5->adapter;
153 unsigned int server_base = t3_read_reg(adap, A_MC5_DB_SERVER_INDEX);
161 dbgi_wr_data3(adap, 0, 0, 0);
163 if (mc5_write(adap, data_array_base + (i << addr_shift),
169 dbgi_wr_data3(adap, 0x3fffffff, 0xfff80000, 0xff);
170 if (mc5_write(adap, mask_array_base + (i << addr_shift),
174 dbgi_wr_data3(adap, 0xffffffff, 0xffffffff, 0xff);
175 if (mc5_write(adap, mask_array_base + (i << addr_shift),
180 dbgi_wr_data3(adap,
184 if (mc5_write(adap, mask_array_base + (i << addr_shift),
194 adapter_t *adap = mc5->adapter;
196 t3_write_reg(adap, A_MC5_DB_RSP_LATENCY,
198 t3_write_reg(adap, A_MC5_DB_PART_ID_INDEX, 2);
204 t3_write_reg(adap, A_MC5_DB_POPEN_DATA_WR_CMD, IDT_CMD_WRITE);
205 t3_write_reg(adap, A_MC5_DB_POPEN_MASK_WR_CMD, IDT_CMD_WRITE);
206 t3_write_reg(adap, A_MC5_DB_AOPEN_SRCH_CMD, IDT_CMD_SEARCH);
207 t3_write_reg(adap, A_MC5_DB_AOPEN_LRN_CMD, IDT_CMD_LEARN);
208 t3_write_reg(adap, A_MC5_DB_SYN_SRCH_CMD, IDT_CMD_SEARCH | 0x6000);
209 t3_write_reg(adap, A_MC5_DB_SYN_LRN_CMD, IDT_CMD_LEARN);
210 t3_write_reg(adap, A_MC5_DB_ACK_SRCH_CMD, IDT_CMD_SEARCH);
211 t3_write_reg(adap, A_MC5_DB_ACK_LRN_CMD, IDT_CMD_LEARN);
212 t3_write_reg(adap, A_MC5_DB_ILOOKUP_CMD, IDT_CMD_SEARCH);
213 t3_write_reg(adap, A_MC5_DB_ELOOKUP_CMD, IDT_CMD_SEARCH | 0x7000);
214 t3_write_reg(adap, A_MC5_DB_DATA_WRITE_CMD, IDT_CMD_WRITE);
215 t3_write_reg(adap, A_MC5_DB_DATA_READ_CMD, IDT_CMD_READ);
218 t3_write_reg(adap, A_MC5_DB_DBGI_CONFIG, DBGI_MODE_IDT52100);
221 dbgi_wr_data3(adap, IDT_LAR_MODE144, 0, 0);
222 if (mc5_write(adap, IDT_LAR_ADR0, IDT_CMD_WRITE))
226 dbgi_wr_data3(adap, 0xffffffff, 0xffffffff, 0);
227 if (mc5_write(adap, IDT_SSR0_ADR0, IDT_CMD_WRITE) ||
228 mc5_write(adap, IDT_SSR1_ADR0, IDT_CMD_WRITE))
234 dbgi_wr_data3(adap, 0xfffffff9, 0xffffffff, 0xff);
236 dbgi_wr_data3(adap, 0xfffffff9, 0xffff8007, 0xff);
238 dbgi_wr_data3(adap, 0xffffffff, 0xffffffff, 0xff);
240 if (mc5_write(adap, IDT_GMR_BASE_ADR0 + i, IDT_CMD_WRITE))
245 dbgi_wr_data3(adap, 1, 0, 0);
246 if (mc5_write(adap, IDT_SCR_ADR0, IDT_CMD_WRITE))
258 adapter_t *adap = mc5->adapter;
260 t3_write_reg(adap, A_MC5_DB_RSP_LATENCY,
261 adap->params.rev == 0 ? V_RDLAT(0xd) | V_SRCHLAT(0x11) :
268 t3_write_reg(adap, A_MC5_DB_POPEN_DATA_WR_CMD, IDT4_CMD_WRITE);
269 t3_write_reg(adap, A_MC5_DB_POPEN_MASK_WR_CMD, IDT4_CMD_WRITE);
270 t3_write_reg(adap, A_MC5_DB_AOPEN_SRCH_CMD,
272 t3_write_reg(adap, A_MC5_DB_SYN_SRCH_CMD, IDT4_CMD_SEARCH144);
273 t3_write_reg(adap, A_MC5_DB_ACK_SRCH_CMD, IDT4_CMD_SEARCH144 | 0x3800);
274 t3_write_reg(adap, A_MC5_DB_ILOOKUP_CMD, IDT4_CMD_SEARCH144 | 0x3800);
275 t3_write_reg(adap, A_MC5_DB_ELOOKUP_CMD, IDT4_CMD_SEARCH144 | 0x800);
276 t3_write_reg(adap, A_MC5_DB_DATA_WRITE_CMD, IDT4_CMD_WRITE);
277 t3_write_reg(adap, A_MC5_DB_DATA_READ_CMD, IDT4_CMD_READ);
279 t3_write_reg(adap, A_MC5_DB_PART_ID_INDEX, 3);
282 t3_write_reg(adap, A_MC5_DB_DBGI_CONFIG, DBGI_MODE_IDT52100);
285 dbgi_wr_data3(adap, 0xffffffff, 0xffffffff, 0xff);
287 if (mc5_write(adap, IDT4_GMR_BASE0 + i, IDT4_CMD_WRITE))
291 if (mc5_write(adap, IDT4_GMR_BASE2 + i, IDT4_CMD_WRITE))
294 dbgi_wr_data3(adap, 0xfffffff9, 0xffffffff, 0xff);
295 if (mc5_write(adap, IDT4_GMR_BASE1, IDT4_CMD_WRITE) ||
296 mc5_write(adap, IDT4_GMR_BASE1 + 1, IDT4_CMD_WRITE) ||
297 mc5_write(adap, IDT4_GMR_BASE1 + 4, IDT4_CMD_WRITE))
300 dbgi_wr_data3(adap, 0xfffffff9, 0xffff8007, 0xff);
301 if (mc5_write(adap, IDT4_GMR_BASE1 + 5, IDT4_CMD_WRITE))
305 dbgi_wr_data3(adap, 0xf0000000, 0, 0);
306 if (mc5_write(adap, IDT4_SCR_ADR0, IDT4_CMD_WRITE))
339 adapter_t *adap = mc5->adapter;
347 if (nfilters && adap->params.rev < T3_REV_C)
351 t3_set_reg_field(adap, A_MC5_DB_CONFIG, F_TMMODE | F_COMPEN,
353 if (t3_wait_op_done(adap, A_MC5_DB_CONFIG, F_TMRDY, 1, 500, 0)) {
354 CH_ERR(adap, "TCAM reset timed out\n");
358 t3_write_reg(adap, A_MC5_DB_ROUTING_TABLE_INDEX, tcam_size - nroutes);
359 t3_write_reg(adap, A_MC5_DB_FILTER_TABLE,
361 t3_write_reg(adap, A_MC5_DB_SERVER_INDEX,
365 t3_write_reg(adap, A_MC5_DB_DBGI_REQ_ADDR1, 0);
366 t3_write_reg(adap, A_MC5_DB_DBGI_REQ_ADDR2, 0);
378 CH_ERR(adap, "Unsupported TCAM type %d\n", mc5->part_type);
401 adapter_t *adap = mc5->adapter;
413 t3_write_reg(adap, A_MC5_DB_DBGI_REQ_ADDR0, start++);
414 if (mc5_cmd_write(adap, read_cmd)) {
418 dbgi_rd_rsp3(adap, buf + 2, buf + 1, buf);
433 adapter_t *adap = mc5->adapter;
434 u32 cause = t3_read_reg(adap, A_MC5_DB_INT_CAUSE);
437 CH_ALERT(adap, "MC5 parity error\n");
442 CH_ALERT(adap, "MC5 request queue parity error\n");
447 CH_ALERT(adap, "MC5 dispatch queue parity error\n");
460 t3_fatal_err(adap);
462 t3_write_reg(adap, A_MC5_DB_INT_CAUSE, cause);
Indexes created Wed Oct 01 19:09:53 GMT 2025