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Lines Matching refs:base_addr

1899  *  @base_addr: base address of queue
1910                enum sge_context_type type, int respq, u64 base_addr,
1916     if (base_addr & 0xfff)     /* must be 4K aligned */
1921     base_addr >>= 12;
1925              V_EC_BASE_LO((u32)base_addr & 0xffff));
1926     base_addr >>= 16;
1927     t3_write_reg(adapter, A_SG_CONTEXT_DATA2, (u32)base_addr);
1928     base_addr >>= 32;
1930              V_EC_BASE_HI((u32)base_addr & 0xf) | V_EC_RESPQ(respq) |
1941  *  @base_addr: base address of queue
1953             u64 base_addr, unsigned int size, unsigned int bsize,
1956     if (base_addr & 0xfff)     /* must be 4K aligned */
1961     base_addr >>= 12;
1962     t3_write_reg(adapter, A_SG_CONTEXT_DATA0, (u32)base_addr);
1963     base_addr >>= 32;
1965              V_FL_BASE_HI((u32)base_addr) |
1981  *  @base_addr: base address of queue
1992              u64 base_addr, unsigned int size,
1997     if (base_addr & 0xfff)     /* must be 4K aligned */
2002     base_addr >>= 12;
2005     t3_write_reg(adapter, A_SG_CONTEXT_DATA1, (u32)base_addr);
2006     base_addr >>= 32;
2010              V_CQ_BASE_HI((u32)base_addr) | intr | V_RQ_GEN(gen));
2019  *  @base_addr: base address of queue
2030 int t3_sge_init_cqcntxt(adapter_t *adapter, unsigned int id, u64 base_addr,
2034     if (base_addr & 0xfff)     /* must be 4K aligned */
2039     base_addr >>= 12;
2041     t3_write_reg(adapter, A_SG_CONTEXT_DATA1, (u32)base_addr);
2042     base_addr >>= 32;
2044              V_CQ_BASE_HI((u32)base_addr) | V_CQ_RSPQ(rspq) |
3583                    unsigned int base_addr, const char *name)
3589     mc7->offset = base_addr - MC7_PMRX_BASE_ADDR;