Cross Reference: /src/sys/dev/pci/cxgb/cxgb

Lines Matching refs:adap
57 int t3_elmr_blk_write(adapter_t *adap, int start, const u32 *vals, int n)
60     const struct mdio_ops *mo = adapter_info(adap)->mdio_ops;
62     ELMR_LOCK(adap);
63     ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_ADDR, start);
65         ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_LO,
68             ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_HI,
71     ELMR_UNLOCK(adap);
75 static int elmr_write(adapter_t *adap, int addr, u32 val)
77     return t3_elmr_blk_write(adap, addr, &val, 1);
80 int t3_elmr_blk_read(adapter_t *adap, int start, u32 *vals, int n)
84     const struct mdio_ops *mo = adapter_info(adap)->mdio_ops;
86     ELMR_LOCK(adap);
88     ret = mo->write(adap, ELMR_MDIO_ADDR, 0, ELMR_ADDR, start);
93         ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_STAT, &v);
106         ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_LO, vals);
108             ret = mo->read(adap, ELMR_MDIO_ADDR, 0, ELMR_DATA_HI,
113 out:    ELMR_UNLOCK(adap);
117 int t3_vsc7323_init(adapter_t *adap, int nports)
146         if ((ret = t3_elmr_blk_write(adap, sys_avp[i].reg_addr,
159             (ret = elmr_write(adap, VSC_REG(2, 0, 0x10 + i),
161             (ret = elmr_write(adap, VSC_REG(2, 0, 0x40 + i),
163             (ret = elmr_write(adap, VSC_REG(2, 0, 0x50 + i), 1)) ||
164             (ret = elmr_write(adap, VSC_REG(2, 1, 0x10 + i),
166             (ret = elmr_write(adap, VSC_REG(2, 1, 0x40 + i),
168             (ret = elmr_write(adap, VSC_REG(2, 1, 0x50 + i), 0)))
175         if ((ret = t3_elmr_blk_write(adap, fifo_avp[i].reg_addr,
180         if ((ret = t3_elmr_blk_write(adap, xg_avp[i].reg_addr,
185         if ((ret = elmr_write(adap, VSC_REG(1, i, 0), 0xa59c)) ||
186             (ret = elmr_write(adap, VSC_REG(1, i, 5),
188             (ret = elmr_write(adap, VSC_REG(1, i, 0xb), 0x96)) ||
189             (ret = elmr_write(adap, VSC_REG(1, i, 0x15), 0x21)) ||
190             (ret = elmr_write(adap, ELMR_THRES0 + i, 768)))
193     if ((ret = elmr_write(adap, ELMR_BW, 7)))
199 int t3_vsc7323_set_speed_fc(adapter_t *adap, int speed, int fc, int port)
213         if ((r = elmr_write(adap, VSC_REG(1, port, 0),
215             (r = elmr_write(adap, VSC_REG(1, port, 0xb),
217             (r = elmr_write(adap, VSC_REG(1, port, 0xb),
219             (r = elmr_write(adap, VSC_REG(1, port, 0),
227     return elmr_write(adap, VSC_REG(1, port, 1), r);
230 int t3_vsc7323_set_mtu(adapter_t *adap, unsigned int mtu, int port)
232     return elmr_write(adap, VSC_REG(1, port, 2), mtu);
235 int t3_vsc7323_set_addr(adapter_t *adap, u8 addr[6], int port)
239     ret = elmr_write(adap, VSC_REG(1, port, 3),
242         ret = elmr_write(adap, VSC_REG(1, port, 4),
247 int t3_vsc7323_enable(adapter_t *adap, int port, int which)
252     ret = t3_elmr_blk_read(adap, VSC_REG(1, port, 0), &v, 1);
260             ret = elmr_write(adap, VSC_REG(1, port, 0), v);
265 int t3_vsc7323_disable(adapter_t *adap, int port, int which)
270     ret = t3_elmr_blk_read(adap, VSC_REG(1, port, 0), &v, 1);
278             ret = elmr_write(adap, VSC_REG(1, port, 0), v);
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