Cross Reference: /src/sys/dev/pci/cxgb/cxgb

Lines Matching refs:t3_write_reg
65     t3_write_reg(adap, ctrl, adap->params.vpd.xauicfg[macidx(mac)] |
110     t3_write_reg(adap, A_XGM_RESET_CTRL + oft, F_MAC_RESET_);
137         t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + oft,
146         t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
147         t3_write_reg(adap, A_XGM_RX_CTRL + oft, F_RXEN);
157     t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val);
182     t3_write_reg(adap, A_XGM_RESET_CTRL + oft, F_MAC_RESET_);
195     t3_write_reg(adap, A_XGM_RESET_CTRL + oft, 0); /*MAC in reset*/
205     t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val);
211     t3_write_reg(adap, A_XGM_RX_CFG + oft,
235     t3_write_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_LOW_1 + oft, addr_lo);
236     t3_write_reg(mac->adapter, A_XGM_RX_EXACT_MATCH_HIGH_1 + oft, addr_hi);
271         t3_write_reg(mac->adapter, reg, v);
282         t3_write_reg(mac->adapter, reg, v);
334     t3_write_reg(adap, A_XGM_RX_HASH_LOW + oft, hash_lo);
335     t3_write_reg(adap, A_XGM_RX_HASH_HIGH + oft, hash_hi);
376             t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
380         t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
381         t3_write_reg(adap, A_XGM_RX_CFG + mac->offset, v);
384         t3_write_reg(adap, A_XGM_RX_MAX_PKT_SIZE + mac->offset, mtu);
399     t3_write_reg(adap, A_XGM_RXFIFO_CFG + mac->offset, v);
415         t3_write_reg(adap, A_XGM_PAUSE_TIMER + mac->offset,
417     t3_write_reg(adap, A_XGM_TX_PAUSE_QUANTA + mac->offset,
435         t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val);
462     t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val);
480         t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
481         t3_write_reg(adap, A_TP_PIO_DATA, 0xc0ede401);
482         t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE);
485         t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
487         t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CNT_CH0 + idx);
504         t3_write_reg(adap, A_XGM_RX_CTRL + oft, F_RXEN);
516         t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
525         t3_write_reg(adap, A_XGM_RX_CTRL + mac->offset, 0);
532         t3_write_reg(mac->adapter, A_XGM_RESET_CTRL + mac->offset, val);
563             t3_write_reg(adap, A_TP_PIO_ADDR,
612         t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
614         t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, mac->txen);
687     t3_write_reg(mac->adapter, A_TP_MIB_INDEX, mac->offset ? 51 : 50);
OpenGrok
