Cross Reference: /src/sys/dev/pci/if

Lines Matching refs:CSR_WRITE_4
151 	CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_READ |
191 	CSR_WRITE_4(sc, ALE_MDIO, MDIO_OP_EXECUTE | MDIO_OP_WRITE |
248 		CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
299 		CSR_WRITE_4(sc, ALE_SPI_CTRL, reg);
308 		CSR_WRITE_4(sc, ALE_TWSI_CTRL, CSR_READ_4(sc, ALE_TWSI_CTRL) |
1079 		CSR_WRITE_4(sc, ALE_MBOX_TPD_PROD_IDX,
1155 	CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
1295 	CSR_WRITE_4(sc, ALE_INTR_STATUS, status | INTR_DIS_INT);
1323 	CSR_WRITE_4(sc, ALE_INTR_STATUS, 0x7FFFFFFF);
1580 	CSR_WRITE_4(sc, 0x1008, CSR_READ_4(sc, 0x1008) | 0x8000);
1582 	CSR_WRITE_4(sc, ALE_MASTER_CFG, MASTER_RESET);
1627 	CSR_WRITE_4(sc, ALE_PAR0,
1629 	CSR_WRITE_4(sc, ALE_PAR1, eaddr[0] << 8 | eaddr[1]);
1636 	CSR_WRITE_4(sc, ALE_WOL_CFG, 0);
1643 	CSR_WRITE_4(sc, ALE_TPD_ADDR_HI, ALE_ADDR_HI(paddr));
1644 	CSR_WRITE_4(sc, ALE_TPD_ADDR_LO, ALE_ADDR_LO(paddr));
1645 	CSR_WRITE_4(sc, ALE_TPD_CNT,
1650 	CSR_WRITE_4(sc, ALE_RXF0_PAGE0_ADDR_LO, ALE_ADDR_LO(paddr));
1652 	CSR_WRITE_4(sc, ALE_RXF0_PAGE1_ADDR_LO, ALE_ADDR_LO(paddr));
1656 	CSR_WRITE_4(sc, ALE_TX_CMB_ADDR_LO, ALE_ADDR_LO(paddr));
1658 	CSR_WRITE_4(sc, ALE_RXF0_CMB0_ADDR_LO, ALE_ADDR_LO(paddr));
1660 	CSR_WRITE_4(sc, ALE_RXF0_CMB1_ADDR_LO, ALE_ADDR_LO(paddr));
1671 	CSR_WRITE_4(sc, ALE_RXF_PAGE_SIZE, ALE_RX_PAGE_SZ);
1674 	CSR_WRITE_4(sc, ALE_DMA_BLOCK, DMA_BLOCK_LOAD);
1677 	CSR_WRITE_4(sc, ALE_INT_TRIG_THRESH, (1 << INT_TRIG_RX_THRESH_SHIFT) |
1684 	CSR_WRITE_4(sc, ALE_INT_TRIG_TIMER,
1693 	CSR_WRITE_4(sc, ALE_IM_TIMER, reg);
1701 	CSR_WRITE_4(sc, ALE_MASTER_CFG, reg);
1710 	CSR_WRITE_4(sc, ALE_FRAME_SIZE, sc->ale_max_frame_size);
1713 	CSR_WRITE_4(sc, ALE_IPG_IFG_CFG,
1720 	CSR_WRITE_4(sc, ALE_HDPX_CFG,
1738 		CSR_WRITE_4(sc, ALE_TX_JUMBO_THRESH,
1748 	CSR_WRITE_4(sc, ALE_TXQ_CFG, reg | TXQ_CFG_ENHANCED_MODE | TXQ_CFG_ENB);
1753 		CSR_WRITE_4(sc, ALE_RX_JUMBO_THRESH,
1761 		CSR_WRITE_4(sc, ALE_RX_FIFO_PAUSE_THRESH,
1769 	CSR_WRITE_4(sc, ALE_RSS_IDT_TABLE0, 0);
1770 	CSR_WRITE_4(sc, ALE_RSS_CPU, 0);
1773 	CSR_WRITE_4(sc, ALE_RXQ_CFG,
1780 	CSR_WRITE_4(sc, ALE_DMA_CFG,
1795 	CSR_WRITE_4(sc, ALE_SMB_STAT_TIMER, ALE_USECS(0));
1818 	CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
1825 	CSR_WRITE_4(sc, ALE_INTR_MASK, ALE_INTRS);
1826 	CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
1827 	CSR_WRITE_4(sc, ALE_INTR_STATUS, 0);
1866 	CSR_WRITE_4(sc, ALE_INTR_MASK, 0);
1867 	CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
1872 	CSR_WRITE_4(sc, ALE_TXQ_CFG, reg);
1875 	CSR_WRITE_4(sc, ALE_RXQ_CFG, reg);
1878 	CSR_WRITE_4(sc, ALE_DMA_CFG, reg);
1885 	CSR_WRITE_4(sc, ALE_INTR_STATUS, 0xFFFFFFFF);
1909 		CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
1977 	CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
2031 	CSR_WRITE_4(sc, ALE_MAR0, mchash[0]);
2032 	CSR_WRITE_4(sc, ALE_MAR1, mchash[1]);
2033 	CSR_WRITE_4(sc, ALE_MAC_CFG, rxcfg);
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