Lines Matching defs:mpi_ctrl
2808 uint64_t mpi_ctrl;
2813 mpi_ctrl = AQ_READ64_REG(sc, FW2X_MPI_CONTROL_REG);
2817 mpi_ctrl &= ~FW2X_CTRL_RATE_MASK;
2819 mpi_ctrl |= FW2X_CTRL_RATE_10G;
2821 mpi_ctrl |= FW2X_CTRL_RATE_5G;
2823 mpi_ctrl |= FW2X_CTRL_RATE_2G5;
2825 mpi_ctrl |= FW2X_CTRL_RATE_1G;
2827 mpi_ctrl |= FW2X_CTRL_RATE_100M;
2829 mpi_ctrl &= ~FW2X_CTRL_LINK_DROP;
2831 mpi_ctrl &= ~FW2X_CTRL_EEE_MASK;
2833 mpi_ctrl |= FW2X_CTRL_EEE_MASK;
2835 mpi_ctrl &= ~(FW2X_CTRL_PAUSE | FW2X_CTRL_ASYMMETRIC_PAUSE);
2837 mpi_ctrl |= FW2X_CTRL_PAUSE;
2839 mpi_ctrl |= FW2X_CTRL_ASYMMETRIC_PAUSE;
2842 mpi_ctrl &= ~(FW2X_CTRL_RATE_MASK | FW2X_CTRL_EEE_MASK);
2843 mpi_ctrl &= ~(FW2X_CTRL_PAUSE | FW2X_CTRL_ASYMMETRIC_PAUSE);
2850 AQ_WRITE64_REG(sc, FW2X_MPI_CONTROL_REG, mpi_ctrl);
2864 uint64_t mpi_ctrl = AQ_READ64_REG(sc, FW2X_MPI_CONTROL_REG);
2865 if (mpi_ctrl & FW2X_CTRL_RATE_MASK)
2905 uint64_t mpi_ctrl = AQ_READ64_REG(sc, FW2X_MPI_CONTROL_REG);
2910 if ((mpi_ctrl & mask) != (mpi_state & mask)) {
2914 (unsigned long long)mpi_ctrl, (unsigned long long)mpi_state,
2920 mpi_ctrl ^= mask;
2921 AQ_WRITE64_REG(sc, FW2X_MPI_CONTROL_REG, mpi_ctrl);
2924 mpi_ctrl &= mask;
2927 WAIT_FOR((AQ_READ64_REG(sc, FW2X_MPI_CONTROL_REG) & mask) == mpi_ctrl,
Indexes created Sat Sep 27 14:09:57 GMT 2025