Lines Matching defs:mode_ctl
2092 uint32_t dma_rw_ctl, misc_ctl, mode_ctl, reg;
2117 mode_ctl = CSR_READ_4(sc, BGE_MODE_CTL);
2119 /* Temporary modify MODE_CTL to control TLP */
2120 reg = mode_ctl & ~BGE_MODECTL_PCIE_TLPADDRMASK;
2130 CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
2136 mode_ctl = CSR_READ_4(sc, BGE_MODE_CTL);
2138 /* Temporary modify MODE_CTL to control TLP */
2139 reg = mode_ctl & ~BGE_MODECTL_PCIE_TLPADDRMASK;
2150 CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
2163 mode_ctl = CSR_READ_4(sc, BGE_MODE_CTL);
2165 /* Temporary modify MODE_CTL to control TLP */
2166 reg = mode_ctl & ~BGE_MODECTL_PCIE_TLPADDRMASK;
2178 CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
2286 mode_ctl = BGE_DMA_SWAP_OPTIONS;
2290 mode_ctl |= CSR_READ_4(sc, BGE_MODE_CTL) &
2295 mode_ctl |= BGE_MODECTL_MAC_ATTN_INTR | BGE_MODECTL_HOST_SEND_BDS |
2306 mode_ctl |= BGE_MODECTL_FORCE_PCI32;
2312 mode_ctl |= BGE_MODECTL_STACKUP;
2314 CSR_WRITE_4(sc, BGE_MODE_CTL, mode_ctl);
Indexes created Mon Sep 29 21:09:56 GMT 2025