Cross Reference: /src/sys/dev/pci/if

Lines Matching defs:rxr
1098 	struct iavf_rx_ring *rxr;
1109 		rxr = sc->sc_qps[i].qp_rxr;
1112 		iavf_rxfill(sc, rxr);
1154 	struct iavf_rx_ring *rxr;
1183 		rxr = sc->sc_qps[i].qp_rxr;
1186 		mutex_enter(&rxr->rxr_lock);
1187 		iavf_rxr_clean(sc, rxr);
1188 		mutex_exit(&rxr->rxr_lock);
2334 	struct iavf_rx_ring *rxr;
2339 	rxr = kmem_zalloc(sizeof(*rxr), KM_NOSLEEP);
2340 	if (rxr == NULL)
2348 	if (iavf_dmamem_alloc(sc->sc_dmat, &rxr->rxr_mem,
2361 	snprintf(rxr->rxr_name, sizeof(rxr->rxr_name), "%s-rx%d",
2364 	iavf_evcnt_attach(&rxr->rxr_mgethdr_failed,
2365 	    rxr->rxr_name, "MGETHDR failed");
2366 	iavf_evcnt_attach(&rxr->rxr_mgetcl_failed,
2367 	    rxr->rxr_name, "MCLGET failed");
2368 	iavf_evcnt_attach(&rxr->rxr_mbuf_load_failed,
2369 	    rxr->rxr_name, "bus_dmamap_load_mbuf failed");
2370 	iavf_evcnt_attach(&rxr->rxr_defer,
2371 	    rxr->rxr_name, "Handled queue in softint/workqueue");
2373 	evcnt_attach_dynamic(&rxr->rxr_intr, EVCNT_TYPE_INTR, NULL,
2374 	    rxr->rxr_name, "Interrupt on queue");
2376 	rxr->rxr_qid = qid;
2377 	rxr->rxr_sc = sc;
2378 	rxr->rxr_cons = rxr->rxr_prod = 0;
2379 	rxr->rxr_m_head = NULL;
2380 	rxr->rxr_m_tail = &rxr->rxr_m_head;
2381 	rxr->rxr_maps = maps;
2382 	rxr->rxr_tail = I40E_QRX_TAIL1(qid);
2383 	mutex_init(&rxr->rxr_lock, MUTEX_DEFAULT, IPL_NET);
2385 	return rxr;
2393 	iavf_dmamem_free(sc->sc_dmat, &rxr->rxr_mem);
2397 	kmem_free(rxr, sizeof(*rxr));
2403 iavf_rxr_free(struct iavf_softc *sc, struct iavf_rx_ring *rxr)
2408 	maps = rxr->rxr_maps;
2416 		rxr->rxr_maps = NULL;
2419 	evcnt_detach(&rxr->rxr_mgethdr_failed);
2420 	evcnt_detach(&rxr->rxr_mgetcl_failed);
2421 	evcnt_detach(&rxr->rxr_mbuf_load_failed);
2422 	evcnt_detach(&rxr->rxr_defer);
2423 	evcnt_detach(&rxr->rxr_intr);
2425 	iavf_dmamem_free(sc->sc_dmat, &rxr->rxr_mem);
2426 	mutex_destroy(&rxr->rxr_lock);
2427 	kmem_free(rxr, sizeof(*rxr));
2509 iavf_rxfill(struct iavf_softc *sc, struct iavf_rx_ring *rxr)
2518 	slots = ixl_rxr_unrefreshed(rxr->rxr_prod, rxr->rxr_cons,
2526 	prod = rxr->rxr_prod;
2528 	ring = IXL_DMA_KVA(&rxr->rxr_mem);
2532 		rxm = &rxr->rxr_maps[prod];
2536 			rxr->rxr_mgethdr_failed.ev_count++;
2543 			rxr->rxr_mgetcl_failed.ev_count++;
2556 			rxr->rxr_mbuf_load_failed.ev_count++;
2577 		rxr->rxr_prod = prod;
2578 		iavf_wr(sc, rxr->rxr_tail, prod);
2632 iavf_rxeof(struct iavf_softc *sc, struct iavf_rx_ring *rxr, u_int rxlimit,
2646 	KASSERT(mutex_owned(&rxr->rxr_lock));
2651 	prod = rxr->rxr_prod;
2652 	cons = rxr->rxr_cons;
2657 	bus_dmamap_sync(sc->sc_dmat, IXL_DMA_MAP(&rxr->rxr_mem),
2658 	    0, IXL_DMA_LEN(&rxr->rxr_mem),
2661 	ring = IXL_DMA_KVA(&rxr->rxr_mem);
2679 		rxm = &rxr->rxr_maps[cons];
2696 		*rxr->rxr_m_tail = m;
2697 		rxr->rxr_m_tail = &m->m_next;
2699 		m = rxr->rxr_m_head;
2726 			rxr->rxr_m_head = NULL;
2727 			rxr->rxr_m_tail = &rxr->rxr_m_head;
2738 		rxr->rxr_cons = cons;
2739 		if (iavf_rxfill(sc, rxr) == -1)
2745 	bus_dmamap_sync(sc->sc_dmat, IXL_DMA_MAP(&rxr->rxr_mem),
2746 	    0, IXL_DMA_LEN(&rxr->rxr_mem),
2753 iavf_rxr_clean(struct iavf_softc *sc, struct iavf_rx_ring *rxr)
2759 	KASSERT(mutex_owned(&rxr->rxr_lock));
2761 	maps = rxr->rxr_maps;
2777 	m_freem(rxr->rxr_m_head);
2778 	rxr->rxr_m_head = NULL;
2779 	rxr->rxr_m_tail = &rxr->rxr_m_head;
2781 	memset(IXL_DMA_KVA(&rxr->rxr_mem), 0, IXL_DMA_LEN(&rxr->rxr_mem));
2782 	rxr->rxr_prod = rxr->rxr_cons = 0;
3091 	struct iavf_rx_ring *rxr;
3096 	rxr = qp->qp_rxr;
3102 	mutex_enter(&rxr->rxr_lock);
3103 	rxmore = iavf_rxeof(sc, rxr, rxlimit, rxevcnt);
3104 	mutex_exit(&rxr->rxr_lock);
3230 	struct iavf_rx_ring *rxr;
3258 			rxr = sc->sc_qps[i].qp_rxr;
3261 			mutex_enter(&rxr->rxr_lock);
3262 			while (iavf_rxeof(sc, rxr, UINT_MAX,
3263 			    &rxr->rxr_intr) != 0) {
3266 			mutex_exit(&rxr->rxr_lock);
3285 	struct iavf_rx_ring *rxr;
3292 	rxr = qp->qp_rxr;
3301 	    txlimit, &txr->txr_intr, rxlimit, &rxr->rxr_intr);
3331 	struct iavf_rx_ring *rxr;
3338 	rxr = qp->qp_rxr;
3346 	    txlimit, &txr->txr_defer, rxlimit, &rxr->rxr_defer);
4637 	struct iavf_rx_ring *rxr;
4657 			rxr = sc->sc_qps[num_vec].qp_rxr;
4662 			vec[num_vec].rxq_map = htole16(__BIT(rxr->rxr_qid));
4704 	struct iavf_rx_ring *rxr;
4723 		rxr = sc->sc_qps[i].qp_rxr;
4736 		rxq->queue_id = htole16(rxr->rxr_qid);
4741 		rxq->dma_ring_addr = htole64(IXL_DMA_DVA(&rxr->rxr_mem));
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