Cross Reference: /src/sys/dev/pci/if

Lines Matching refs:sbuf
378 	struct ipw_soft_buf *sbuf;
566 		sbuf = &sc->tx_sbuf_list[i];
569 		    IPW_MAX_NSEG, MCLBYTES, 0, BUS_DMA_NOWAIT, &sbuf->map);
574 		TAILQ_INSERT_TAIL(&sc->sc_free_sbuf, sbuf, next);
591 		sbuf = &sc->rx_sbuf_list[i];
594 		MGETHDR(sbuf->m, M_DONTWAIT, MT_DATA);
595 		if (sbuf->m == NULL) {
601 		MCLGET(sbuf->m, M_DONTWAIT);
602 		if (!(sbuf->m->m_flags & M_EXT)) {
603 			m_freem(sbuf->m);
604 			sbuf->m = NULL;
610 		sbuf->m->m_pkthdr.len = sbuf->m->m_len = sbuf->m->m_ext.ext_size;
613 		    0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &sbuf->map);
616 			m_freem(sbuf->m);
617 			sbuf->m = NULL;
621 		error = bus_dmamap_load_mbuf(sc->sc_dmat, sbuf->map,
622 		    sbuf->m, BUS_DMA_READ | BUS_DMA_NOWAIT);
624 			bus_dmamap_destroy(sc->sc_dmat, sbuf->map);
625 			sbuf->map = NULL;
626 			m_freem(sbuf->m);
627 			sbuf->m = NULL;
633 		sbd->priv = sbuf;
634 		sbd->bd->physaddr = htole32(sbuf->map->dm_segs[0].ds_addr);
637 		bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0,
638 		    sbuf->map->dm_mapsize, BUS_DMASYNC_PREREAD);
654 	struct ipw_soft_buf *sbuf;
707 		sbuf = &sc->rx_sbuf_list[i];
708 		if (sbuf->map != NULL) {
709 			if (sbuf->m != NULL) {
710 				bus_dmamap_unload(sc->sc_dmat, sbuf->map);
711 				m_freem(sbuf->m);
713 			bus_dmamap_destroy(sc->sc_dmat, sbuf->map);
901 ipw_command_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
904 	bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0, sizeof (struct ipw_cmd),
908 	struct ipw_cmd *cmd = mtod(sbuf->m, struct ipw_cmd *);
919 ipw_newstate_intr(struct ipw_softc *sc, struct ipw_soft_buf *sbuf)
926 	bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0, sizeof state,
929 	state = le32toh(*mtod(sbuf->m, uint32_t *));
1006     struct ipw_soft_bd *sbd, struct ipw_soft_buf *sbuf)
1045 	bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0, le32toh(status->len),
1047 	bus_dmamap_unload(sc->sc_dmat, sbuf->map);
1049 	error = bus_dmamap_load_mbuf(sc->sc_dmat, sbuf->map, mnew,
1056 		error = bus_dmamap_load_mbuf(sc->sc_dmat, sbuf->map,
1057 		    sbuf->m, BUS_DMA_READ | BUS_DMA_NOWAIT);
1071 	m = sbuf->m;
1072 	sbuf->m = mnew;
1073 	sbd->bd->physaddr = htole32(sbuf->map->dm_segs[0].ds_addr);
1103 	bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0,
1104 	    sbuf->map->dm_mapsize, BUS_DMASYNC_PREREAD);
1112 	struct ipw_soft_buf *sbuf;
1136 		sbuf = sbd->priv;
1140 			ipw_command_intr(sc, sbuf);
1144 			ipw_newstate_intr(sc, sbuf);
1149 			ipw_data_intr(sc, status, sbd, sbuf);
1181 	struct ipw_soft_buf *sbuf;
1198 		sbuf = sbd->priv;
1200 		bus_dmamap_sync(sc->sc_dmat, sbuf->map,
1201 		    0, sbuf->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1202 		bus_dmamap_unload(sc->sc_dmat, sbuf->map);
1203 		m_freem(sbuf->m);
1204 		if (sbuf->ni != NULL)
1205 			ieee80211_free_node(sbuf->ni);
1208 		TAILQ_INSERT_TAIL(&sc->sc_free_sbuf, sbuf, next);
1354 	struct ipw_soft_buf *sbuf;
1379 	sbuf = TAILQ_FIRST(&sc->sc_free_sbuf);
1380 	KASSERT(shdr != NULL && sbuf != NULL);
1398 	error = bus_dmamap_load_mbuf(sc->sc_dmat, sbuf->map, m0,
1432 		error = bus_dmamap_load_mbuf(sc->sc_dmat, sbuf->map, m0,
1442 	TAILQ_REMOVE(&sc->sc_free_sbuf, sbuf, next);
1450 	sbd->bd->nfrag = 1 + sbuf->map->dm_nsegs;
1467 	sbuf->m = m0;
1468 	sbuf->ni = ni;
1470 	for (i = 0; i < sbuf->map->dm_nsegs; i++) {
1473 		sbd->bd->physaddr = htole32(sbuf->map->dm_segs[i].ds_addr);
1474 		sbd->bd->len = htole32(sbuf->map->dm_segs[i].ds_len);
1477 		if (i == sbuf->map->dm_nsegs - 1) {
1479 			sbd->priv = sbuf;
1487 		    (int)sbuf->map->dm_segs[i].ds_len));
1500 	bus_dmamap_sync(sc->sc_dmat, sbuf->map, 0, sbuf->map->dm_mapsize,
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