Lines Matching +defs:ind +defs:offset

611 	/* first 32bit are device load offset */
2491 iwm_nvm_read_chunk(struct iwm_softc *sc, uint16_t section, uint16_t offset,
2494 offset = 0;
2496 .offset = htole16(offset),
2532 offset_read = le16toh(nvm_resp->offset);
2539 if (offset_read != offset) {
2548 memcpy(data + offset, resp_data, bytes_read);
2579 "offset %d, length %d\n",
2854 uint32_t offset = 0;
2906 (const char *)fws->fw_sect[sec_idx].fws_data + offset,
2912 offset += sc->fw_paging_db[idx].fw_paging_size;
2918 (const char *)fws->fw_sect[sec_idx].fws_data + offset,
3293 uint32_t chunk_sz, offset;
3297 for (offset = 0; offset < byte_cnt; offset += chunk_sz) {
3302 addr = dst_addr + offset;
3303 len = MIN(chunk_sz, byte_cnt - offset);
3304 data = section + offset;
3387 uint32_t offset;
3399 offset = fws->fw_sect[i].fws_devoff;
3407 if (!data || offset == IWM_CPU1_CPU2_SEPARATOR_SECTION ||
3408 offset == IWM_PAGING_SEPARATOR_SECTION)
3414 err = iwm_firmware_load_sect(sc, offset, data, dlen);
3475 uint32_t offset;
3489 offset = fws->fw_sect[i].fws_devoff;
3497 if (!data || offset == IWM_CPU1_CPU2_SEPARATOR_SECTION ||
3498 offset == IWM_PAGING_SEPARATOR_SECTION)
3504 err = iwm_firmware_load_sect(sc, offset, data, dlen);
4524 int ridx, rate_flags, i, ind;
4567 for (i = 0, ind = sc->sc_mgmt_last_antenna;
4569 ind = (ind + 1) % IWM_RATE_MCS_ANT_NUM;
4570 if (iwm_fw_valid_tx_ant(sc) & (1 << ind)) {
4571 sc->sc_mgmt_last_antenna = ind;
5150 int i, ind;
5152 for (i = 0, ind = sc->sc_scan_last_antenna;
5154 ind = (ind + 1) % IWM_RATE_MCS_ANT_NUM;
5155 if (iwm_fw_valid_tx_ant(sc) & (1 << ind)) {
5156 sc->sc_scan_last_antenna = ind;
5282 preq->mac_header.offset = 0;
5293 preq->band_data[0].offset = htole16(frm - (uint8_t *)wh);
5319 preq->band_data[1].offset = htole16(frm - (uint8_t *)wh);
5330 preq->common_data.offset = htole16(frm - (uint8_t *)wh);
7786 * Get the offset of the PCI Express Capability Structure in PCI