Cross Reference: /src/sys/dev/pci/if

Lines Matching defs:sections
2663 /* list of NVM sections we are allowed/need to read */
3083 	 * CPU1 sections (2 or more)
3085 	 * CPU2 sections (not paged)
3100 	 * If paging is enabled there should be at least 2 more sections left
3105 		    "Paging: Missing CSS and/or paging sections\n");
3441 iwm_parse_nvm_sections(struct iwm_softc *sc, struct iwm_nvm_section *sections)
3447 	/* Checking for required sections */
3449 		if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
3450 		    !sections[IWM_NVM_SECTION_TYPE_HW].data) {
3454 		hw = (const uint16_t *) sections[IWM_NVM_SECTION_TYPE_HW].data;
3457 			if (!sections[IWM_NVM_SECTION_TYPE_REGULATORY_SDP].data)
3460 			    sections[IWM_NVM_SECTION_TYPE_REGULATORY_SDP].data;
3462 			    sections[IWM_NVM_SECTION_TYPE_REGULATORY_SDP].length
3466 		/* SW and REGULATORY sections are mandatory */
3467 		if (!sections[IWM_NVM_SECTION_TYPE_SW].data ||
3468 		    !sections[IWM_NVM_SECTION_TYPE_REGULATORY].data) {
3472 		if (!sections[IWM_NVM_SECTION_TYPE_HW_8000].data &&
3473 		    !sections[IWM_NVM_SECTION_TYPE_MAC_OVERRIDE].data) {
3478 		if (!sections[IWM_NVM_SECTION_TYPE_PHY_SKU].data) {
3483 		    sections[IWM_NVM_SECTION_TYPE_REGULATORY].data;
3484 		n_regulatory = sections[IWM_NVM_SECTION_TYPE_REGULATORY].length;
3486 		    sections[IWM_NVM_SECTION_TYPE_HW_8000].data;
3489 			sections[IWM_NVM_SECTION_TYPE_MAC_OVERRIDE].data;
3491 		    sections[IWM_NVM_SECTION_TYPE_PHY_SKU].data;
3496 	sw = (const uint16_t *)sections[IWM_NVM_SECTION_TYPE_SW].data;
3498 	    sections[IWM_NVM_SECTION_TYPE_CALIBRATION].data;
3772 	/* load to FW the binary Secured sections of CPU1 */
3777 	/* load to FW the binary sections of CPU2 */