Lines Matching defs:ixl_rd
948 #define ixl_rd(_s, _r) \
954 #define ixl_flush(_s) (void)ixl_rd((_s), I40E_GLGEN_STAT)
1053 firstq = ixl_rd(sc, I40E_PFLAN_QALLOC);
1064 port = ixl_rd(sc, I40E_PFGEN_PORTNUM);
1070 ari = ixl_rd(sc, I40E_GLPCI_CAPSUP);
1074 func = ixl_rd(sc, I40E_PF_FUNC_RID);
2006 reg = ixl_rd(sc, I40E_QRX_ENA(i));
2014 reg = ixl_rd(sc, I40E_QTX_ENA(i));
2209 reg = ixl_rd(sc, I40E_QTX_ENA(i));
2215 reg = ixl_rd(sc, I40E_QRX_ENA(i));
2434 r = ixl_rd(sc, reg);
2508 reg = ixl_rd(sc, ena);
2528 reg = ixl_rd(sc, ena);
3030 reg = ixl_rd(sc, ena);
3050 reg = ixl_rd(sc, ena);
3420 icr = ixl_rd(sc, I40E_PFINT_ICR0);
3529 hmc_data = ixl_rd(sc, I40E_PFHMC_ERRORDATA);
3543 icr = ixl_rd(sc, I40E_PFINT_ICR0);
3544 mask = ixl_rd(sc, I40E_PFINT_ICR0_ENA);
3564 reg = ixl_rd(sc, I40E_GLGEN_RSTAT);
3588 reg = ixl_rd(sc, I40E_PFHMC_ERRORINFO);
3737 prod = ixl_rd(sc, sc->sc_aq_regs->arq_head) &
3966 while (ixl_rd(sc, sc->sc_aq_regs->atq_head) != prod) {
5111 ixl_rd(sc, I40E_GLHMC_LANQMAX);
5118 reg = ixl_rd(sc, regs[i].objsiz);
5395 val = ixl_rd(sc, I40E_GLPCI_CNF2);
5401 val = ixl_rd(sc, I40E_PFLAN_QALLOC);
5411 val = ixl_rd(sc, I40E_PF_VT_PFALLOC);
5450 val = ixl_rd(sc, I40E_GLLAN_TXPRE_QDIS(reg_block));
5484 grst_del = ixl_rd(sc, I40E_GLGEN_RSTCTL);
5491 reg = ixl_rd(sc, I40E_GLGEN_RSTAT);
5503 reg = ixl_rd(sc, I40E_GLNVM_ULD);
5524 reg = ixl_rd(sc, I40E_PFGEN_CTRL);
5527 reg = ixl_rd(sc, I40E_PFGEN_CTRL);
5532 reg0 = ixl_rd(sc, I40E_GLGEN_RSTAT);
5937 (void)ixl_rd(sc, I40E_PFINT_ICR0);
6300 value = ixl_rd(sc, reg_lo);
6303 value |= ((uint64_t)ixl_rd(sc, reg_hi) << 32);
6856 val = ixl_rd(sc, reg);
6991 reg = ixl_rd(sc, I40E_GLNVM_SRCTL);
7022 reg = ixl_rd(sc, I40E_GLNVM_SRDATA);