Cross Reference: /src/sys/dev/pci/if

Lines Matching defs:eq
4360 mcx_create_eq(struct mcx_softc *sc, struct mcx_eq *eq, int uar,
4373 	eq->eq_cons = 0;
4380 	if (mcx_dmamem_alloc(sc, &eq->eq_mem, npages * MCX_PAGE_SIZE,
4386 	eqe = (struct mcx_eq_entry *)MCX_DMA_KVA(&eq->eq_mem);
4402 		printf(", unable to allocate create eq mailboxen\n");
4411 	bus_dmamap_sync(sc->sc_dmat, MCX_DMA_MAP(&eq->eq_mem),
4412 	    0, MCX_DMA_LEN(&eq->eq_mem), BUS_DMASYNC_PREREAD);
4415 	mcx_cmdq_mboxes_pas(&mxm, sizeof(*mbin), npages, &eq->eq_mem);
4421 		printf(", create eq timeout\n");
4425 		printf(", create eq command corrupt\n");
4431 		printf(", create eq failed (%x, %x)\n", out->cmd_status,
4436 	eq->eq_n = mcx_get_id(out->cmd_eqn);
4440 	mcx_arm_eq(sc, eq, uar);
4445 	bus_dmamap_sync(sc->sc_dmat, MCX_DMA_MAP(&eq->eq_mem),
4446 	    0, MCX_DMA_LEN(&eq->eq_mem), BUS_DMASYNC_POSTREAD);
4449 	mcx_dmamem_free(sc, &eq->eq_mem);
6675 mcx_query_eq(struct mcx_softc *sc, struct mcx_eq *eq, struct mcx_eq_ctx *eq_ctx)
6692 	in->cmd_eqn = htobe32(eq->eq_n);
6697 		printf("%s: unable to allocate query eq mailboxes\n",
6707 		printf("%s: query eq timeout\n", DEVNAME(sc));
6711 		printf("%s: query eq reply corrupt\n", DEVNAME(sc));
6720 		printf("%s: query eq failed (%x/%x)\n", DEVNAME(sc),
7123 mcx_arm_eq(struct mcx_softc *sc, struct mcx_eq *eq, int uar)
7129 	val = (eq->eq_n << 24) | (eq->eq_cons & 0xffffff);
7136 mcx_next_eq_entry(struct mcx_softc *sc, struct mcx_eq *eq)
7141 	eqe = (struct mcx_eq_entry *)MCX_DMA_KVA(&eq->eq_mem);
7142 	next = eq->eq_cons % (1 << MCX_LOG_EQ_SIZE);
7144 	    ((eq->eq_cons >> MCX_LOG_EQ_SIZE) & 1)) {
7145 		eq->eq_cons++;
7155 	struct mcx_eq *eq = &sc->sc_admin_eq;
7158 	bus_dmamap_sync(sc->sc_dmat, MCX_DMA_MAP(&eq->eq_mem),
7159 	    0, MCX_DMA_LEN(&eq->eq_mem), BUS_DMASYNC_POSTREAD);
7161 	while ((eqe = mcx_next_eq_entry(sc, eq)) != NULL) {
7185 	bus_dmamap_sync(sc->sc_dmat, MCX_DMA_MAP(&eq->eq_mem),
7186 	    0, MCX_DMA_LEN(&eq->eq_mem), BUS_DMASYNC_PREREAD);
7188 	mcx_arm_eq(sc, eq, sc->sc_uar);
7198 	struct mcx_eq *eq = &q->q_eq;
7202 	bus_dmamap_sync(sc->sc_dmat, MCX_DMA_MAP(&eq->eq_mem),
7203 	    0, MCX_DMA_LEN(&eq->eq_mem), BUS_DMASYNC_POSTREAD);
7205 	while ((eqe = mcx_next_eq_entry(sc, eq)) != NULL) {
7215 	bus_dmamap_sync(sc->sc_dmat, MCX_DMA_MAP(&eq->eq_mem),
7216 	    0, MCX_DMA_LEN(&eq->eq_mem), BUS_DMASYNC_PREREAD);
7218 	mcx_arm_eq(sc, eq, q->q_uar);
8741 	{ "EQ SW cons",		KSTAT_KV_T_COUNTER64 },
8742 	{ "EQ HW prod",		KSTAT_KV_T_COUNTER64 },
8743 	{ "EQ HW cons",		KSTAT_KV_T_COUNTER64 },
8744 	{ "EQ HW status",	KSTAT_KV_T_ISTR },
8745 	{ "EQ HW state",	KSTAT_KV_T_ISTR },
8795 		struct mcx_eq_ctx eq;
8902 	if (mcx_query_eq(sc, &q->q_eq, &u.eq) != 0) {
8908 	kstat_kv_u64(kvs++) = bemtoh32(&u.eq.eq_producer_counter);
8909 	kstat_kv_u64(kvs++) = bemtoh32(&u.eq.eq_consumer_counter);
8911 	switch ((bemtoh32(&u.eq.eq_status) & MCX_EQ_CTX_STATUS_MASK) >>
8926 	switch ((bemtoh32(&u.eq.eq_status) & MCX_EQ_CTX_STATE_MASK) >>
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