Cross Reference: /src/sys/dev/pci/if

Lines Matching defs:tx_ring
618 	struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
624 	    &tx_ring->map);
632 	    &tx_ring->seg, 1, &tx_ring->nsegs, BUS_DMA_NOWAIT);
639 	error = bus_dmamem_map(sc->sc_dmat, &tx_ring->seg, tx_ring->nsegs,
640 	    size, (void **)&tx_ring->desc, BUS_DMA_NOWAIT);
642 		bus_dmamem_free(sc->sc_dmat, &tx_ring->seg, tx_ring->nsegs);
646 	memset(tx_ring->desc, 0, size);
648 	error = bus_dmamap_load(sc->sc_dmat, tx_ring->map, tx_ring->desc,
657 		struct r92c_tx_desc_pci *desc = &tx_ring->desc[i];
660 		desc->nextdescaddr = htole32(tx_ring->map->dm_segs[0].ds_addr
663 		tx_data = &tx_ring->tx_data[i];
684 	struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
688 		struct r92c_tx_desc_pci *desc = &tx_ring->desc[i];
689 		struct rtwn_tx_data *tx_data = &tx_ring->tx_data[i];
705 	tx_ring->queued = 0;
706 	tx_ring->cur = 0;
712 	struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
716 	if (tx_ring->map != NULL) {
717 		if (tx_ring->desc != NULL) {
718 			bus_dmamap_unload(sc->sc_dmat, tx_ring->map);
719 			bus_dmamem_unmap(sc->sc_dmat, tx_ring->desc,
721 			bus_dmamem_free(sc->sc_dmat, &tx_ring->seg,
722 			    tx_ring->nsegs);
724 		bus_dmamap_destroy(sc->sc_dmat, tx_ring->map);
728 		tx_data = &tx_ring->tx_data[i];
739 	tx_ring->queued = 0;
740 	tx_ring->cur = 0;
1831 	struct rtwn_tx_ring *tx_ring;
1867 	tx_ring = &sc->tx_ring[qid];
1868 	data = &tx_ring->tx_data[tx_ring->cur];
1875 	txd = &tx_ring->desc[tx_ring->cur];
1986 	bus_dmamap_sync(sc->sc_dmat, tx_ring->map, 0,
2006 	tx_ring->cur = (tx_ring->cur + 1) % RTWN_TX_LIST_COUNT;
2007 	tx_ring->queued++;
2009 	if (tx_ring->queued > RTWN_TX_LIST_HIMARK)
2023 	struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
2033 	bus_dmamap_sync(sc->sc_dmat, tx_ring->map,
2038 		tx_data = &tx_ring->tx_data[i];
2042 		tx_desc = &tx_ring->desc[i];
2054 		tx_ring->queued--;
2057 	if (tx_ring->queued < RTWN_TX_LIST_LOMARK)
2626 		sc->tx_ring[RTWN_BK_QUEUE].map->dm_segs[0].ds_addr);
2628 		sc->tx_ring[RTWN_BE_QUEUE].map->dm_segs[0].ds_addr);
2630 		sc->tx_ring[RTWN_VI_QUEUE].map->dm_segs[0].ds_addr);
2632 		sc->tx_ring[RTWN_VO_QUEUE].map->dm_segs[0].ds_addr);
2634 		sc->tx_ring[RTWN_BEACON_QUEUE].map->dm_segs[0].ds_addr);
2636 		sc->tx_ring[RTWN_MGNT_QUEUE].map->dm_segs[0].ds_addr);
2638 		sc->tx_ring[RTWN_HIGH_QUEUE].map->dm_segs[0].ds_addr);
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