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Lines Matching refs:Rx

531 	/* stop TX and RX channels */
750 	/* write address of Rx list and enable interrupts */
989 	struct Rx_list *Rx;
1015 			Rx = sc->active_Rx;
1016 			sc->active_Rx = Rx->next;
1017 			bus_dmamap_sync(sc->tl_dmatag, Rx->m_dmamap, 0,
1018 			    Rx->m_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1019 			bus_dmamap_unload(sc->tl_dmatag, Rx->m_dmamap);
1020 			m = Rx->m;
1021 			size = le32toh(Rx->hw_list->stat) >> 16;
1023 			printf("%s: RX list complete, Rx %p, size=%d\n",
1024 			    __func__, Rx, size);
1026 			if (tl_add_RxBuff(sc, Rx, m) == 0) {
1041 			Rx->next = NULL;
1042 			Rx->hw_list->fwd = 0;
1043 			sc->last_Rx->hw_list->fwd = htole32(Rx->hw_listaddr);
1044 			sc->last_Rx->next = Rx;
1045 			sc->last_Rx = Rx;
1059 					printf("%s: Rx packet:\n", __func__);
1092 			printf("%s: Rx EOC interrupt and active Tx list not "
1099 		 * write address of Rx list and send Rx GO command, ack
1416 tl_add_RxBuff(tl_softc_t *sc, struct Rx_list *Rx, struct mbuf *oldm)
1440 	Rx->m = m;
1441 	if ((error = bus_dmamap_load(sc->tl_dmatag, Rx->m_dmamap,
1447 		Rx->m = NULL;
1450 	bus_dmamap_sync(sc->tl_dmatag, Rx->m_dmamap, 0,
1451 	    Rx->m_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1458 	Rx->hw_list->stat =
1459 	    htole32(((Rx->m_dmamap->dm_segs[0].ds_len - 2) << 16) | 0x3000);
1460 	Rx->hw_list->seg.data_count =
1461 	    htole32(Rx->m_dmamap->dm_segs[0].ds_len - 2);
1462 	Rx->hw_list->seg.data_addr =
1463 	    htole32(Rx->m_dmamap->dm_segs[0].ds_addr + 2);