Cross Reference: /src/sys/dev/pci/if

Lines Matching defs:nvm
566 	int sc_nvm_addrbits;		/* NVM address bits */
567 	unsigned int sc_nvm_wordsize;	/* NVM word size */
724 					 * is used for both PHY and NVM.
726 	kmutex_t *sc_ich_nvmmtx;	/* ICH/PCH specific NVM mutex */
729 	struct wm_nvmop nvm;
1042  * NVM related.
1072 /* Lock, detecting NVM type, validate checksum and read */
2069 	sc->phy.acquire = sc->nvm.acquire = wm_get_null;
2070 	sc->phy.release = sc->nvm.release = wm_put_null;
2432 	/* Set PHY, NVM mutex related stuff */
2439 		sc->nvm.read = wm_nvm_read_uwire;
2449 		sc->nvm.read = wm_nvm_read_uwire;
2459 		sc->nvm.acquire = wm_get_eecd;
2460 		sc->nvm.release = wm_put_eecd;
2472 		sc->nvm.acquire = wm_get_eecd;
2473 		sc->nvm.release = wm_put_eecd;
2476 			sc->nvm.read = wm_nvm_read_spi;
2481 			sc->nvm.read = wm_nvm_read_uwire;
2494 		sc->nvm.read = wm_nvm_read_eerd;
2500 		sc->nvm.acquire = wm_get_nvm_82571;
2501 		sc->nvm.release = wm_put_nvm_82571;
2506 		sc->nvm.read = wm_nvm_read_eerd;
2511 			sc->nvm.acquire = wm_get_nvm_82571;
2512 			sc->nvm.release = wm_put_nvm_82571;
2514 			/* Both PHY and NVM use the same semaphore. */
2515 			sc->phy.acquire = sc->nvm.acquire
2517 			sc->phy.release = sc->nvm.release
2540 			sc->nvm.read = wm_nvm_read_eerd;
2543 			sc->nvm.read = wm_nvm_read_spi;
2548 		sc->nvm.acquire = wm_get_nvm_80003;
2549 		sc->nvm.release = wm_put_nvm_80003;
2557 		sc->nvm.read = wm_nvm_read_ich8;
2579 		sc->nvm.acquire = wm_get_nvm_ich8lan;
2580 		sc->nvm.release = wm_put_nvm_ich8lan;
2585 		sc->nvm.read = wm_nvm_read_spt;
2601 		sc->nvm.acquire = wm_get_nvm_ich8lan;
2602 		sc->nvm.release = wm_put_nvm_ich8lan;
2609 			sc->nvm.read = wm_nvm_read_eerd;
2614 			sc->nvm.read = wm_nvm_read_invm;
2620 		sc->nvm.acquire = wm_get_nvm_80003;
2621 		sc->nvm.release = wm_put_nvm_80003;
2627 	/* Ensure the SMBI bit is clear before first NVM or PHY access */
2735 	 * c) Chip is I210 (and it uses FLASH) and the NVM image version < 3.25
2906 				/* Check NVM for autonegotiation */
2998 		/* Save the NVM K1 bit setting */
4847 	/* Configure the LCD with the extended configuration region in NVM */
4851 	/* Configure the LCD with the OEM bits in NVM */
4979 		 * LCD Write Enable bits are set in the NVM. When both NVM bits
5026  *  SW will configure Gbe Disable and LPLU based on the NVM. The four bits are
5028  *  in NVM determines whether HW should configure LPLU and Gbe Disable.
5176 			 *   NVM Image Version 2.1.4 and newer has no this bug.
5812 		 * Phy configuration from NVM just starts after EECD_AUTO_RD
6613 		    "\t0x20 NVM\n"	\
14164  * NVM related.
14243 	rv = sc->nvm.acquire(sc);
14292 	sc->nvm.release(sc);
14312 	/* Read the size of NVM from EECD by default */
14408 	rv = sc->nvm.acquire(sc);
14448 	sc->nvm.release(sc);
14483 	rv = sc->nvm.acquire(sc);
14499 	sc->nvm.release(sc);
14544 		    "%s: no valid NVM bank present (%u)\n", __func__, *bank);
14574 	DPRINTF(sc, WM_DEBUG_NVM, ("%s: No valid NVM bank present\n",
14714  * Reads a byte or (d)word from the NVM using the ICH8 flash access registers.
14816  * Reads a single byte from the NVM using the ICH8 flash access registers.
14838  * Reads a word from the NVM using the ICH8 flash access registers.
14860  * Reads a dword from the NVM using the ICH8 flash access registers.
14897 	rv = sc->nvm.acquire(sc);
14909 		DPRINTF(sc, WM_DEBUG_NVM, ("%s: failed to detect NVM bank\n",
14921 		/* The NVM part needs a byte offset, hence * 2 */
14926 			    "%s: failed to read NVM\n", __func__);
14932 	sc->nvm.release(sc);
14958 	rv = sc->nvm.acquire(sc);
14970 		DPRINTF(sc, WM_DEBUG_NVM, ("%s: failed to detect NVM bank\n",
14982 		/* The NVM part needs a byte offset, hence * 2 */
14988 			    "%s: failed to read NVM\n", __func__);
14998 	sc->nvm.release(sc);
15046 	rv = sc->nvm.acquire(sc);
15105 			    ("NVM word 0x%02x is not mapped.\n", offset));
15111 	sc->nvm.release(sc);
15115 /* Lock, detecting NVM type, validate checksum, version and read */
15187 			    ("%s: NVM need to be updated (%04x != %04x)\n",
15193 		printf("%s: NVM dump:\n", device_xname(sc->sc_dev));
15214 		printf("%s: NVM checksum mismatch (%04x != %04x)\n",
15405 	rv = sc->nvm.read(sc, word, wordcnt, data);
15500 	/* Stop nvm */
15780 	mutex_enter(sc->sc_ich_phymtx); /* Use PHY mtx for both PHY and NVM */
15793 	mutex_exit(sc->sc_ich_phymtx); /* Use PHY mtx for both PHY and NVM */
15809 	mutex_exit(sc->sc_ich_phymtx); /* Use PHY mtx for both PHY and NVM */
16628  *  the LPLU setting in the NVM or custom setting.  For PCH and newer parts,
17663  *  in the NVM.
17917 		aprint_error_dev(sc->sc_dev, "%s: failed to read NVM\n",
OpenGrok
