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Lines Matching refs:DTX_CONTROL

1233 	PIF_WCSR(DTX_CONTROL, 0x8000051500000000ULL); DELAY(50);
1234 	PIF_WCSR(DTX_CONTROL, 0x80000515000000E0ULL); DELAY(50);
1235 	PIF_WCSR(DTX_CONTROL, 0x80000515D93500E4ULL); DELAY(50);
1238 	PIF_WCSR(DTX_CONTROL, 0x8001051500000000ULL); DELAY(50);
1239 	PIF_WCSR(DTX_CONTROL, 0x80010515000000e0ULL); DELAY(50);
1240 	PIF_WCSR(DTX_CONTROL, 0x80010515001e00e4ULL); DELAY(50);
1243 	PIF_WCSR(DTX_CONTROL, 0x8002051500000000ULL); DELAY(50);
1244 	PIF_WCSR(DTX_CONTROL, 0x80020515000000E0ULL); DELAY(50);
1245 	PIF_WCSR(DTX_CONTROL, 0x80020515F21000E4ULL); DELAY(50);
1248 	PIF_WCSR(DTX_CONTROL, 0x8000051500000000ULL); DELAY(50);
1249 	PIF_WCSR(DTX_CONTROL, 0x80000515000000e0ULL); DELAY(50);
1250 	PIF_WCSR(DTX_CONTROL, 0x80000515000000ecULL); DELAY(50);
1252 	PIF_WCSR(DTX_CONTROL, 0x8001051500000000ULL); DELAY(50);
1253 	PIF_WCSR(DTX_CONTROL, 0x80010515000000e0ULL); DELAY(50);
1254 	PIF_WCSR(DTX_CONTROL, 0x80010515000000ecULL); DELAY(50);
1256 	PIF_WCSR(DTX_CONTROL, 0x8002051500000000ULL); DELAY(50);
1257 	PIF_WCSR(DTX_CONTROL, 0x80020515000000e0ULL); DELAY(50);
1258 	PIF_WCSR(DTX_CONTROL, 0x80020515000000ecULL); DELAY(50);
1262 	PIF_WCSR(DTX_CONTROL, 0x0018040000000000ULL); DELAY(50);
1263 	PIF_WCSR(DTX_CONTROL, 0x00180400000000e0ULL); DELAY(50);
1264 	PIF_WCSR(DTX_CONTROL, 0x00180400000000ecULL); DELAY(50);
1283 	PIF_WCSR(DTX_CONTROL, 0x0000051500000000ULL); DELAY(50);
1284 	PIF_WCSR(DTX_CONTROL, 0x00000515604000e0ULL); DELAY(50);
1285 	PIF_WCSR(DTX_CONTROL, 0x00000515604000e4ULL); DELAY(50);
1286 	PIF_WCSR(DTX_CONTROL, 0x00000515204000e4ULL); DELAY(50);
1287 	PIF_WCSR(DTX_CONTROL, 0x00000515204000ecULL); DELAY(50);
1291 	val = PIF_RCSR(DTX_CONTROL);
1293 		printf("%s: DTX_CONTROL: %llx != %llx\n",