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Lines Matching defs:ret_val

144 	int ret_val = IGC_SUCCESS;
151 	ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
152 	if (ret_val)
153 		return ret_val;
157 	ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
158 	if (ret_val)
159 		return ret_val;
296 	int ret_val;
303 	ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
304 	if (ret_val)
305 		return ret_val;
309 		ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,
311 		if (ret_val)
312 			return ret_val;
317 		ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<
320 		if (ret_val)
321 			return ret_val;
440 	ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
441 	if (ret_val)
442 		return ret_val;
447 		ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,
451 		ret_val = phy->ops.write_reg(hw,
455 	return ret_val;
472 	int ret_val;
488 	ret_val = igc_phy_setup_autoneg(hw);
489 	if (ret_val) {
491 		return ret_val;
498 	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
499 	if (ret_val)
500 		return ret_val;
503 	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
504 	if (ret_val)
505 		return ret_val;
511 		ret_val = igc_wait_autoneg(hw);
512 		if (ret_val)
513 			return ret_val;
518 	return ret_val;
533 	int ret_val;
542 		ret_val = igc_copper_link_autoneg(hw);
543 		if (ret_val)
544 			return ret_val;
550 		ret_val = hw->phy.ops.force_speed_duplex(hw);
551 		if (ret_val) {
553 			return ret_val;
560 	ret_val = igc_phy_has_link_generic(hw, COPPER_LINK_UP_LIMIT, 10,
562 	if (ret_val)
563 		return ret_val;
568 		ret_val = igc_config_fc_after_link_up_generic(hw);
572 	return ret_val;
587 	int ret_val;
599 	return ret_val;
613 	int ret_val = IGC_SUCCESS;
622 		ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);
623 		if (ret_val)
625 		ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);
626 		if (ret_val)
636 	return ret_val;
653 	int ret_val = IGC_SUCCESS;
665 		ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);
666 		if (ret_val) {
676 		ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);
677 		if (ret_val)
689 	return ret_val;
706 	int ret_val;
711 		ret_val = phy->ops.check_reset_block(hw);
712 		if (ret_val)
716 	ret_val = phy->ops.acquire(hw);
717 	if (ret_val)
718 		return ret_val;
744 	return ret_val;
800 	int ret_val;
807 		ret_val = hw->phy.ops.acquire(hw);
808 		if (ret_val)
809 			return ret_val;
810 		ret_val = igc_write_phy_reg_mdic(hw, offset, data);
811 		if (ret_val)
812 			return ret_val;
815 		ret_val = igc_write_xmdio_reg(hw, (uint16_t)offset, dev_addr,
819 	return ret_val;
836 	int ret_val;
843 		ret_val = hw->phy.ops.acquire(hw);
844 		if (ret_val)
845 			return ret_val;
846 		ret_val = igc_read_phy_reg_mdic(hw, offset, data);
847 		if (ret_val)
848 			return ret_val;
851 		ret_val = igc_read_xmdio_reg(hw, (uint16_t)offset, dev_addr,
855 	return ret_val;
870 	int ret_val;
874 	ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, dev_addr);
875 	if (ret_val)
876 		return ret_val;
878 	ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, address);
879 	if (ret_val)
880 		return ret_val;
882 	ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, IGC_MMDAC_FUNC_DATA |
884 	if (ret_val)
885 		return ret_val;
888 		ret_val = hw->phy.ops.read_reg(hw, IGC_MMDAAD, data);
890 		ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, *data);
891 	if (ret_val)
892 		return ret_val;
895 	ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, 0);
896 	if (ret_val)
897 		return ret_val;
899 	return ret_val;