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Lines Matching refs:ops

28 	phy->ops.init_params = igc_null_ops_generic;
29 	phy->ops.acquire = igc_null_ops_generic;
30 	phy->ops.check_reset_block = igc_null_ops_generic;
31 	phy->ops.force_speed_duplex = igc_null_ops_generic;
32 	phy->ops.get_info = igc_null_ops_generic;
33 	phy->ops.set_page = igc_null_set_page;
34 	phy->ops.read_reg = igc_null_read_reg;
35 	phy->ops.read_reg_locked = igc_null_read_reg;
36 	phy->ops.read_reg_page = igc_null_read_reg;
37 	phy->ops.release = igc_null_phy_generic;
38 	phy->ops.reset = igc_null_ops_generic;
39 	phy->ops.set_d0_lplu_state = igc_null_lplu_state;
40 	phy->ops.set_d3_lplu_state = igc_null_lplu_state;
41 	phy->ops.write_reg = igc_null_write_reg;
42 	phy->ops.write_reg_locked = igc_null_write_reg;
43 	phy->ops.write_reg_page = igc_null_write_reg;
44 	phy->ops.power_up = igc_null_phy_generic;
45 	phy->ops.power_down = igc_null_phy_generic;
148 	if (!phy->ops.read_reg)
151 	ret_val = phy->ops.read_reg(hw, PHY_ID1, &phy_id);
157 	ret_val = phy->ops.read_reg(hw, PHY_ID2, &phy_id);
303 	ret_val = phy->ops.read_reg(hw, PHY_AUTONEG_ADV, &mii_autoneg_adv_reg);
309 		ret_val = phy->ops.read_reg(hw, PHY_1000T_CTRL,
317 		ret_val = phy->ops.read_reg(hw, (STANDARD_AN_REG_MASK <<
440 	ret_val = phy->ops.write_reg(hw, PHY_AUTONEG_ADV, mii_autoneg_adv_reg);
447 		ret_val = phy->ops.write_reg(hw, PHY_1000T_CTRL,
451 		ret_val = phy->ops.write_reg(hw,
498 	ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_ctrl);
503 	ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_ctrl);
550 		ret_val = hw->phy.ops.force_speed_duplex(hw);
567 		hw->mac.ops.config_collision_dist(hw);
617 	if (!hw->phy.ops.read_reg)
622 		ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);
625 		ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);
657 	if (!hw->phy.ops.read_reg)
665 		ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);
676 		ret_val = hw->phy.ops.read_reg(hw, MII_BMSR, &phy_status);
710 	if (phy->ops.check_reset_block) {
711 		ret_val = phy->ops.check_reset_block(hw);
716 	ret_val = phy->ops.acquire(hw);
742 	phy->ops.release(hw);
761 	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
763 	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
781 	hw->phy.ops.read_reg(hw, PHY_CONTROL, &mii_reg);
783 	hw->phy.ops.write_reg(hw, PHY_CONTROL, mii_reg);
807 		ret_val = hw->phy.ops.acquire(hw);
813 		hw->phy.ops.release(hw);
843 		ret_val = hw->phy.ops.acquire(hw);
849 		hw->phy.ops.release(hw);
874 	ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, dev_addr);
878 	ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, address);
882 	ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, IGC_MMDAC_FUNC_DATA |
888 		ret_val = hw->phy.ops.read_reg(hw, IGC_MMDAAD, data);
890 		ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAAD, *data);
895 	ret_val = hw->phy.ops.write_reg(hw, IGC_MMDAC, 0);