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Lines Matching refs:write_reg

422 		co->write_reg(cd, sc->sc_chip.vga_cntrl, r | VGA_CNTRL_DISABLE);
428 		co->write_reg(cd, PF_WINPOS(pipe),
430 		co->write_reg(cd, PF_WINSZ(pipe),
434 		co->write_reg(cd, PIPE_SRCSZ(pipe),
438 		co->write_reg(cd, PIPE_CONF(pipe),
445 		co->write_reg(cd, PRI_CTRL(pipe), r | cd->pri_cntrl);
446 		co->write_reg(cd, PRI_LINOFF(pipe), 0);
447 		co->write_reg(cd, PRI_STRIDE(pipe), sc->sc_stride);
448 		co->write_reg(cd, PRI_SURF(pipe), 0);
449 		co->write_reg(cd, PRI_TILEOFF(pipe), 0);
458 		co->write_reg(cd, PRI_CTRL(pipe), 0 | cd->pri_cntrl);
459 		co->write_reg(cd, PRI_LINOFF(pipe), 0);
460 		co->write_reg(cd, PRI_STRIDE(pipe), 2560);
461 		co->write_reg(cd, PRI_SURF(pipe), 0);
462 		co->write_reg(cd, PRI_TILEOFF(pipe), 0);
465 		co->write_reg(cd, PIPE_SRCSZ(pipe),
469 		co->write_reg(cd, PIPE_CONF(pipe), 0);
478 		co->write_reg(cd, 0x42000, (r & 0x1fffffff) | 0xa0000000);
480 		co->write_reg(cd, 0x42004, (r & 0xfbffffff) | 0x00000000);
483 		co->write_reg(cd, PF_WINPOS(pipe),
485 		co->write_reg(cd, PF_WINSZ(pipe),
490 		co->write_reg(cd, sc->sc_chip.vga_cntrl, r & ~VGA_CNTRL_DISABLE);
500 		co->write_reg(cd, PIPE_CONF(pipe),
515 	co->write_reg(cd, FW_BLC_SELF, fwbcl & ~FW_BLC_SELF_EN);
518 	co->write_reg(cd, CUR_CNTR(pipe), 1<<5 | 0x07);
523 	co->write_reg(cd, CUR_CNTR(pipe), cntrl);
524 	co->write_reg(cd, CUR_BASE(pipe),
527 	co->write_reg(cd, FW_BLC_SELF, fwbcl);
539 	co->write_reg(cd, PF_CTRL_I965, r & ~PF_ENABLE);
584 	co->write_reg(cd, cd->backlight_cntrl,