Lines Matching defs:txr
670 struct tx_ring *txr = sc->tx_rings;
677 for (i = 0; i < sc->num_queues; i++, txr++) {
678 u64 tdba = txr->txdma.dma_paddr;
683 int j = txr->me;
709 txr->tail = IXGBE_TDT(j);
711 txr->txr_no_space = false;
1812 struct tx_ring *txr = sc->tx_rings;
1885 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) {
1917 ixgbe_sysctl_tdh_handler, 0, (void *)txr,
1924 ixgbe_sysctl_tdt_handler, 0, (void *)txr,
1967 evcnt_attach_dynamic(&txr->total_packets, EVCNT_TYPE_MISC,
1975 evcnt_attach_dynamic(&txr->pcq_drops, EVCNT_TYPE_MISC,
1979 evcnt_attach_dynamic(&txr->no_desc_avail, EVCNT_TYPE_MISC,
1982 evcnt_attach_dynamic(&txr->tso_tx, EVCNT_TYPE_MISC,
2141 struct tx_ring *txr = sc->tx_rings;
2178 txr = sc->tx_rings;
2179 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) {
2183 IXGBE_EVC_STORE(&txr->total_packets, 0);
2185 IXGBE_EVC_STORE(&txr->pcq_drops, 0);
2187 IXGBE_EVC_STORE(&txr->no_desc_avail, 0);
2188 IXGBE_EVC_STORE(&txr->tso_tx, 0);
2189 txr->q_efbig_tx_dma_setup = 0;
2190 txr->q_mbuf_defrag_failed = 0;
2191 txr->q_efbig2_tx_dma_setup = 0;
2192 txr->q_einval_tx_dma_setup = 0;
2193 txr->q_other_tx_dma_setup = 0;
2194 txr->q_eagain_tx_dma_setup = 0;
2195 txr->q_enomem_tx_dma_setup = 0;
2196 txr->q_tso_err = 0;
2281 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
2285 if (!txr)
2288 sc = txr->sc;
2292 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(txr->me));
2306 struct tx_ring *txr = (struct tx_ring *)node.sysctl_data;
2310 if (!txr)
2313 sc = txr->sc;
2317 val = IXGBE_READ_REG(&sc->hw, IXGBE_TDT(txr->me));
2820 struct tx_ring *txr = que->txr;
2837 IXGBE_TX_LOCK(txr);
2838 ixgbe_txeof(txr);
2839 IXGBE_TX_UNLOCK(txr);
2857 if ((txr->bytes == 0) && (rxr->bytes == 0))
2860 if ((txr->bytes) && (txr->packets))
2861 newitr = txr->bytes/txr->packets;
2890 txr->bytes = 0;
2891 txr->packets = 0;
3649 struct tx_ring *txr = sc->tx_rings;
3652 for (i = 0; i < sc->num_queues; i++, que++, txr++) {
3654 if (txr->txr_si != NULL)
3655 softint_disestablish(txr->txr_si);
3702 struct tx_ring *txr = sc->tx_rings;
3794 txr = sc->tx_rings;
3795 for (i = 0; i < sc->num_queues; i++, rxr++, txr++) {
3799 evcnt_detach(&txr->total_packets);
3801 evcnt_detach(&txr->pcq_drops);
3803 evcnt_detach(&txr->no_desc_avail);
3804 evcnt_detach(&txr->tso_tx);
4054 struct tx_ring *txr;
4143 txr = &sc->tx_rings[i];
4144 txdctl = IXGBE_READ_REG(hw, IXGBE_TXDCTL(txr->me));
4157 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(txr->me), txdctl);
4400 struct tx_ring *txr = &sc->tx_rings[i];
4404 ixgbe_set_ivar(sc, txr->me, que->msix, 1);
4660 struct tx_ring *txr = que->txr;
4662 v0 += txr->q_efbig_tx_dma_setup;
4663 v1 += txr->q_mbuf_defrag_failed;
4664 v2 += txr->q_efbig2_tx_dma_setup;
4665 v3 += txr->q_einval_tx_dma_setup;
4666 v4 += txr->q_other_tx_dma_setup;
4667 v5 += txr->q_eagain_tx_dma_setup;
4668 v6 += txr->q_enomem_tx_dma_setup;
4669 v7 += txr->q_tso_err;
4688 if (que->txr->busy)
4708 que->txr->busy = IXGBE_QUEUE_HUNG;
5300 struct tx_ring *txr = sc->tx_rings;
5334 IXGBE_TX_LOCK(txr);
5335 ixgbe_txeof(txr);
5337 if (!ixgbe_ring_empty(ifp, txr->br))
5338 ixgbe_start_locked(ifp, txr);
5340 IXGBE_TX_UNLOCK(txr);
6694 struct tx_ring *txr = que->txr;
6701 IXGBE_TX_LOCK(txr);
6702 more = ixgbe_txeof(txr);
6704 if (!ixgbe_mq_ring_empty(ifp, txr->txr_interq))
6705 ixgbe_mq_start_locked(ifp, txr);
6710 ixgbe_legacy_start_locked(ifp, txr);
6711 IXGBE_TX_UNLOCK(txr);
6753 struct tx_ring *txr = sc->tx_rings;
6822 txr->txr_si =
6824 ixgbe_deferred_mq_start, txr);
6841 && ((txr->txr_si == NULL) || defertx_error != 0))
6862 struct tx_ring *txr = sc->tx_rings;
6909 for (int i = 0; i < sc->num_queues; i++, vector++, que++, txr++) {
6972 txr->txr_si = softint_establish(
6974 ixgbe_deferred_mq_start, txr);
6975 if (txr->txr_si == NULL) {