Lines Matching refs:ixgbe_hw
43 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map);
45 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
47 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
48 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
49 extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw);
50 extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);
51 extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);
52 extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw);
53 extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw);
55 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
56 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
57 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
58 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
59 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
60 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
61 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
62 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
63 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
64 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
65 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
66 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
67 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
68 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
70 s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
71 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
72 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
74 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
77 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
78 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw);
79 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
82 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
85 s32 ixgbe_set_phy_power(struct ixgbe_hw *, bool on);
86 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
87 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
88 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
89 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
91 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
93 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
95 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
97 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
98 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
99 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
100 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
102 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
103 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
104 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
106 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
107 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
110 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
111 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
113 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
114 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
116 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
117 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
118 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);
119 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
120 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
121 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
122 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
124 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
127 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
128 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
129 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
130 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
131 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
133 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
136 s32 ixgbe_toggle_txdctl(struct ixgbe_hw *hw, u32 vind);
137 s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
138 s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
139 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
141 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
142 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
144 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
145 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
146 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
147 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
148 u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
149 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
150 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw);
151 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw);
152 s32 ixgbe_mng_fw_enabled(struct ixgbe_hw *hw);
153 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
154 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
155 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
157 void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
161 s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
163 s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
166 s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
169 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
179 bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw);
180 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
182 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
184 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
185 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
186 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
188 void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue);
189 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
191 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
192 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
193 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
194 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
195 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
196 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
197 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
198 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
199 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw);
200 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
202 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
203 s32 ixgbe_bypass_rw(struct ixgbe_hw *hw, u32 cmd, u32 *status);
204 s32 ixgbe_bypass_set(struct ixgbe_hw *hw, u32 cmd, u32 event, u32 action);
205 s32 ixgbe_bypass_rd_eep(struct ixgbe_hw *hw, u32 addr, u8 *value);
206 bool ixgbe_bypass_valid_rd(struct ixgbe_hw *hw, u32 in_reg, u32 out_reg);
207 s32 ixgbe_dmac_config(struct ixgbe_hw *hw);
208 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw);
209 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw);
210 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee);
211 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
213 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable,
215 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
217 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
219 void ixgbe_disable_mdd(struct ixgbe_hw *hw);
220 void ixgbe_enable_mdd(struct ixgbe_hw *hw);
221 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);
222 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);
223 bool ixgbe_fw_recovery_mode(struct ixgbe_hw *hw);
224 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw);
225 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw);
226 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed);
227 void ixgbe_disable_rx(struct ixgbe_hw *hw);
228 void ixgbe_enable_rx(struct ixgbe_hw *hw);
229 s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
Indexes created Wed Oct 15 16:09:53 GMT 2025