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Lines Matching defs:nic_i

199 	u_int nic_i;	/* index into the NIC ring */
220 	 * nic_i is the corresponding index in the NIC ring.
226 	 *		nic_i = IXGBE_TDT (not tracked in the driver)
228 	 * 		nm_i == (nic_i + kring->nkr_hwofs) % ring_size
254 		nic_i = netmap_idx_k2n(kring, nm_i);
257 		__builtin_prefetch(&txr->tx_buffers[nic_i]);
266 			union ixgbe_adv_tx_desc *curr = &txr->tx_base[nic_i];
267 			struct ixgbe_tx_buf *txbuf = &txr->tx_buffers[nic_i];
269 				nic_i == 0 || nic_i == report_frequency) ?
274 			__builtin_prefetch(&txr->tx_buffers[nic_i + 1]);
296 			nic_i = nm_next(nic_i, lim);
304 		/* (re)start the tx unit up to slot nic_i (excluded) */
305 		IXGBE_WRITE_REG(&sc->hw, txr->tail, nic_i);
329 		nic_i = txr->next_to_clean + report_frequency;
330 		if (nic_i > lim)
331 			nic_i -= lim + 1;
333 		nic_i = (nic_i < kring->nkr_num_slots / 4 ||
334 			 nic_i >= kring->nkr_num_slots*3/4) ?
336 		reclaim_tx = txd[nic_i].upper.fields.status & IXGBE_TXD_STAT_DD;	// XXX cpu_to_le32 ?
349 		nic_i = IXGBE_READ_REG(&sc->hw, IXGBE_TDH(kring->ring_id));
350 		if (nic_i >= kring->nkr_num_slots) { /* XXX can it happen ? */
352 			D("TDH wrap %d", nic_i);
354 			nic_i -= kring->nkr_num_slots;
356 		if (nic_i != txr->next_to_clean) {
358 			txr->next_to_clean = nic_i;
359 			kring->nr_hwtail = nm_prev(netmap_idx_n2k(kring, nic_i), lim);
387 	u_int nic_i;	/* index into the NIC ring */
408 	 * nic_i is the index of the next received packet in the NIC ring,
412 	 *	nic_i = rxr->next_to_check;
415 	 *	nm_i == (nic_i + kring->nkr_hwofs) % ring_size
422 		nic_i = rxr->next_to_check; // or also k2n(kring->nr_hwtail)
423 		nm_i = netmap_idx_n2k(kring, nic_i);
426 			union ixgbe_adv_rx_desc *curr = &rxr->rx_base[nic_i];
434 			    rxr->rx_buffers[nic_i].pmap, BUS_DMASYNC_POSTREAD);
436 			nic_i = nm_next(nic_i, lim);
444 			rxr->next_to_check = nic_i;
455 	 * nic_i is the index in the NIC ring, and
456 	 * nm_i == (nic_i + kring->nkr_hwofs) % ring_size
460 		nic_i = netmap_idx_k2n(kring, nm_i);
466 			union ixgbe_adv_rx_desc *curr = &rxr->rx_base[nic_i];
467 			struct ixgbe_rx_buf *rxbuf = &rxr->rx_buffers[nic_i];
482 			nic_i = nm_next(nic_i, lim);
490 		 * so move nic_i back by one unit
492 		nic_i = nm_prev(nic_i, lim);
493 		IXGBE_WRITE_REG(&sc->hw, rxr->tail, nic_i);