Cross Reference: /src/sys/dev/pci/ixgbe/ixgbe

Lines Matching defs:i2cctl
54 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
55 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl);
56 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data);
57 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl);
2299 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2303 	i2cctl |= IXGBE_I2C_BB_EN_BY_MAC(hw);
2306 	ixgbe_set_i2c_data(hw, &i2cctl, 1);
2307 	ixgbe_raise_i2c_clk(hw, &i2cctl);
2312 	ixgbe_set_i2c_data(hw, &i2cctl, 0);
2317 	ixgbe_lower_i2c_clk(hw, &i2cctl);
2334 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2342 	ixgbe_set_i2c_data(hw, &i2cctl, 0);
2343 	ixgbe_raise_i2c_clk(hw, &i2cctl);
2348 	ixgbe_set_i2c_data(hw, &i2cctl, 1);
2354 		i2cctl &= ~bb_en_bit;
2355 		i2cctl |= data_oe_bit | clk_oe_bit;
2356 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2393 	u32 i2cctl;
2407 	i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2408 	i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
2409 	i2cctl |= IXGBE_I2C_DATA_OE_N_EN_BY_MAC(hw);
2410 	IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2427 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2434 		i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
2435 		i2cctl |= data_oe_bit;
2436 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2439 	ixgbe_raise_i2c_clk(hw, &i2cctl);
2447 		i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2448 		ack = ixgbe_get_i2c_data(hw, &i2cctl);
2460 	ixgbe_lower_i2c_clk(hw, &i2cctl);
2477 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2483 		i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
2484 		i2cctl |= data_oe_bit;
2485 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl);
2488 	ixgbe_raise_i2c_clk(hw, &i2cctl);
2493 	i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2494 	*data = ixgbe_get_i2c_data(hw, &i2cctl);
2496 	ixgbe_lower_i2c_clk(hw, &i2cctl);
2512 	u32 i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2516 	status = ixgbe_set_i2c_data(hw, &i2cctl, data);
2518 		ixgbe_raise_i2c_clk(hw, &i2cctl);
2523 		ixgbe_lower_i2c_clk(hw, &i2cctl);
2541  * @i2cctl: Current value of I2CCTL register
2546 static void ixgbe_raise_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
2556 		*i2cctl |= clk_oe_bit;
2557 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2561 		*i2cctl |= IXGBE_I2C_CLK_OUT_BY_MAC(hw);
2563 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2577  * @i2cctl: Current value of I2CCTL register
2582 static void ixgbe_lower_i2c_clk(struct ixgbe_hw *hw, u32 *i2cctl)
2586 	*i2cctl &= ~(IXGBE_I2C_CLK_OUT_BY_MAC(hw));
2587 	*i2cctl &= ~IXGBE_I2C_CLK_OE_N_EN_BY_MAC(hw);
2589 	IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2599  * @i2cctl: Current value of I2CCTL register
2605 static s32 ixgbe_set_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl, bool data)
2613 		*i2cctl |= IXGBE_I2C_DATA_OUT_BY_MAC(hw);
2615 		*i2cctl &= ~(IXGBE_I2C_DATA_OUT_BY_MAC(hw));
2616 	*i2cctl &= ~data_oe_bit;
2618 	IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2627 		*i2cctl |= data_oe_bit;
2628 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2633 	*i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2634 	if (data != ixgbe_get_i2c_data(hw, i2cctl)) {
2647  * @i2cctl: Current value of I2CCTL register
2652 static bool ixgbe_get_i2c_data(struct ixgbe_hw *hw, u32 *i2cctl)
2660 		*i2cctl |= data_oe_bit;
2661 		IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl);
2666 	if (*i2cctl & IXGBE_I2C_DATA_IN_BY_MAC(hw))
2683 	u32 i2cctl;
2689 	i2cctl = IXGBE_READ_REG(hw, IXGBE_I2CCTL_BY_MAC(hw));
2691 	ixgbe_set_i2c_data(hw, &i2cctl, 1);
2694 		ixgbe_raise_i2c_clk(hw, &i2cctl);
2699 		ixgbe_lower_i2c_clk(hw, &i2cctl);
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