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Lines Matching defs:bcr

715 	pcireg_t bcr, bhlc, cbctl, csr, lscp, mfunc, mrburst, slotctl, sockctl,
763 	bcr = pci_conf_read(pc, tag, PCI_BRIDGE_CONTROL_REG);
764 	bcr |= CB_BCR_INTR_IREQ_ENABLE;		/* disable PCI Intr */
765 	bcr |= CB_BCR_WRITE_POST_ENABLE;	/* enable write post */
767 	bcr |= PCI_BRIDGE_CONTROL_SECBR;
771 	bcr |= PCI_BRIDGE_CONTROL_MABRT;
772 	bcr |= PCI_BRIDGE_CONTROL_SERR;
773 	bcr |= PCI_BRIDGE_CONTROL_PERE;
774 	pci_conf_write(pc, tag, PCI_BRIDGE_CONTROL_REG, bcr);
1441 	uint32_t bcr = pci_conf_read(sc->sc_pc, sc->sc_tag,
1443 	aprint_debug("%s: enter bcr %" PRIx32 "\n", __func__, bcr);
1446 	bcr |= PCI_BRIDGE_CONTROL_SECBR;
1447 	pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG, bcr);
1448 	aprint_debug("%s: wrote bcr %" PRIx32 "\n", __func__, bcr);
1453 		bcr &= ~(PCI_BRIDGE_CONTROL_SECBR);
1455 		    bcr);
1456 		aprint_debug("%s: wrote bcr %" PRIx32 "\n", __func__, bcr);
1674 	pcireg_t bcr, cbctrl;
1677 	bcr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG);
1678 	bcr &= ~CB_BCR_INTR_IREQ_ENABLE;
1679 	pci_conf_write(sc->sc_pc, sc->sc_tag, PCI_BRIDGE_CONTROL_REG, bcr);
3097 		pcireg_t bcr = pci_conf_read(pc, tag, PCI_BRIDGE_CONTROL_REG);
3099 		bcr &= ~(CB_BCR_PREFETCH_MEMWIN0 | CB_BCR_PREFETCH_MEMWIN1);
3101 			bcr |= CB_BCR_PREFETCH_MEMWIN0;
3103 			bcr |= CB_BCR_PREFETCH_MEMWIN1;
3104 		pci_conf_write(pc, tag, PCI_BRIDGE_CONTROL_REG, bcr);