Lines Matching refs:drv
59 #define ACER_FCS_TIMREG(chan,drv) ((0x8) >> ((drv) + (chan) * 2))
68 #define ACER_FTH_VAL(chan, drv, val) \
69 (((val) & 0x3) << ((drv) * 4 + (chan) * 8))
70 #define ACER_FTH_OPL(chan, drv, val) \
71 (((val) & 0x3) << (2 + (drv) * 4 + (chan) * 8))
72 #define ACER_UDMA_EN(chan, drv) \
73 (0x8 << (16 + (drv) * 4 + (chan) * 8))
74 #define ACER_UDMA_TIM(chan, drv, val) \
75 (((val) & 0x7) << (16 + (drv) * 4 + (chan) * 8))
78 #define ACER_IDETIM(chan, drv) (0x5a + (drv) + (chan) * 4)