Lines Matching defs:idetim
431 u_int32_t idetim;
496 ATADEBUG_PRINT(("piix_setup_chip: old idetim=0x%x",
536 idetim = pci_conf_read(sc->sc_pc, sc->sc_tag, PIIX_IDETIM);
537 if ((PIIX_IDETIM_READ(idetim, channel) &
547 idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE,
550 idetim);
553 aprint_normal("channel %d idetim=%08x interface=%02x\n",
554 channel, idetim, interface);
560 ATADEBUG_PRINT(("piix_setup_chip: idetim=0x%x",
597 u_int32_t oidetim, idetim, idedma_ctl;
603 idetim = PIIX_IDETIM_CLEAR(oidetim, 0xffff, chp->ch_channel);
606 /* set up new idetim: Enable IDE registers decode */
607 idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE,
667 idetim |= piix_setup_idetim_timings(
674 idetim |= piix_setup_idetim_timings(
677 idetim |= piix_setup_idetim_timings(
687 idetim |= piix_setup_idetim_drvs(&drvp[drive]);
696 pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_IDETIM, idetim);
703 u_int32_t oidetim, idetim, sidetim, udmareg, ideconf, idedma_ctl;
714 idetim = PIIX_IDETIM_CLEAR(oidetim, 0xffff, channel);
719 /* set up new idetim: Enable IDE registers decode */
720 idetim = PIIX_IDETIM_SET(idetim, PIIX_IDETIM_IDE, channel);
804 idetim |= piix_setup_idetim_timings(
809 idetim =PIIX_IDETIM_SET(idetim,
816 idetim |= piix_setup_idetim_drvs(drvp);
818 idetim |= piix_setup_idetim_timings(
823 idetim =PIIX_IDETIM_SET(idetim,
832 pci_conf_write(sc->sc_pc, sc->sc_tag, PIIX_IDETIM, idetim);
Indexes created Mon Oct 13 04:09:54 GMT 2025