Lines Matching refs:sc_regh
96 bus_space_handle_t sc_regh;
267 reg = bus_space_read_4(sc->sc_memt, sc->sc_regh,
278 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_FILTER_MODE,
280 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_SYNC, 0);
282 while (bus_space_read_4(sc->sc_memt, sc->sc_regh,
284 } while (bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_OUTPUT_FIFO) !=
367 &sc->sc_memt, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) {
740 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM2_DAC_PAL_WRITE_IDX, idx);
741 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM2_DAC_DATA, r);
742 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM2_DAC_DATA, g);
743 bus_space_write_1(sc->sc_memt, sc->sc_regh, PM2_DAC_DATA, b);
751 bus_space_write_1(sc->sc_memt, sc->sc_regh,
753 return bus_space_read_1(sc->sc_memt, sc->sc_regh,
756 bus_space_write_1(sc->sc_memt, sc->sc_regh,
758 bus_space_write_1(sc->sc_memt, sc->sc_regh,
760 return bus_space_read_1(sc->sc_memt, sc->sc_regh,
771 bus_space_write_1(sc->sc_memt, sc->sc_regh,
773 bus_space_write_1(sc->sc_memt, sc->sc_regh,
777 bus_space_write_1(sc->sc_memt, sc->sc_regh,
779 bus_space_write_1(sc->sc_memt, sc->sc_regh,
781 bus_space_write_1(sc->sc_memt, sc->sc_regh,
792 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_SCREEN_BASE, 0);
795 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_APERTURE1_CONTROL,
798 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_APERTURE1_CONTROL, 0);
801 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_BYPASS_MASK,
803 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_FB_WRITE_MASK,
806 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HW_WRITEMASK,
808 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_SW_WRITEMASK,
810 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_WRITE_MODE,
812 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_SCREENSIZE,
814 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_SCISSOR_MODE,
817 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DITHER_MODE, 0);
818 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_ALPHA_MODE, 0);
819 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DDA_MODE, 0);
820 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_TEX_COLOUR_MODE, 0);
821 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_TEX_ADDRESS_MODE, 0);
822 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_TEX_READ_MODE, 0);
823 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_TEX_LUT_MODE, 0);
824 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_YUV_MODE, 0);
826 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DEPTH_MODE, 0);
827 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DEPTH, 0);
828 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_STENCIL_MODE, 0);
829 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_STIPPLE_MODE, 0);
830 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_ROP_MODE, 0);
831 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_WINDOW_ORIGIN, 0);
833 sc->sc_pprod = bus_space_read_4(sc->sc_memt, sc->sc_regh,
839 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_FB_READMODE,
841 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_TEXMAP_FORMAT,
844 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DY, 1 << 16);
845 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DXDOM, 0);
846 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_STARTXDOM, 0);
847 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_STARTXSUB, 0);
848 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_STARTY, 0);
849 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_COUNT, 0);
850 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_SCISSOR_MINYX, 0);
851 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_SCISSOR_MAXYX,
857 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_SCREENSIZE,
862 bus_space_write_4(sc->sc_memt, sc->sc_regh,
866 bus_space_write_4(sc->sc_memt, sc->sc_regh,
870 bus_space_write_4(sc->sc_memt, sc->sc_regh,
876 bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_RE_PIXEL_SIZE));
885 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DDA_MODE, 0);
886 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_MODE, 0);
887 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_ALPHA_MODE, 0);
888 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DITHER_MODE, 0);
889 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_CONFIG,
891 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_BLOCK_COLOUR,
893 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_RECT_START,
895 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_RECT_SIZE,
897 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_RENDER,
925 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DDA_MODE, 0);
926 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_MODE, 0);
927 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_ALPHA_MODE, 0);
928 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DITHER_MODE, 0);
939 bus_space_write_4(sc->sc_memt, sc->sc_regh,
944 bus_space_write_4(sc->sc_memt, sc->sc_regh,
960 bus_space_write_4(sc->sc_memt, sc->sc_regh,
967 bus_space_write_4(sc->sc_memt, sc->sc_regh,
972 bus_space_write_4(sc->sc_memt, sc->sc_regh,
982 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_RECT_START,
984 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_RECT_SIZE,
986 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_SOURCE_DELTA,
988 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_RENDER,
1078 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1080 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1082 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1084 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1086 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1088 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1092 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1094 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1107 sc->sc_regh,
1119 sc->sc_regh,
1180 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_MODE, 0);
1187 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_CONFIG,
1191 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_ALPHA_MODE,
1196 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_RE_DITHER_MODE,
1211 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1213 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1216 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1231 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1348 DPRINTF("data: %08x\n", bus_space_read_4(sc->sc_memt, sc->sc_regh,
1351 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_DISPLAY_DATA, 0);
1427 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_DISPLAY_DATA, out);
1441 bits = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_DISPLAY_DATA);
1550 reg = bus_space_read_1(sc->sc_memt, sc->sc_regh,
1580 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HTOTAL,
1582 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HSYNC_END,
1584 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HSYNC_START,
1586 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HBLANK_END,
1588 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HGATE_END,
1590 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_SCREEN_STRIDE,
1593 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VTOTAL,
1595 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VSYNC_END,
1597 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VSYNC_START,
1599 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VBLANK_END,
1601 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VIDEO_CONTROL,
1605 vclk = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_VCLKCTL);
1606 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VCLKCTL,
1609 tmp = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_CHIP_CONFIG);
1610 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_CHIP_CONFIG,
1651 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HTOTAL,
1653 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HSYNC_END,
1655 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HSYNC_START,
1657 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HBLANK_END,
1659 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_HGATE_END,
1668 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_SCREEN_STRIDE,
1671 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VTOTAL,
1673 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VSYNC_END,
1675 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VSYNC_START,
1677 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VBLANK_END,
1680 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VIDEO_CONTROL,
1684 vclk = bus_space_read_4(sc->sc_memt, sc->sc_regh, PM2_VCLKCTL);
1685 bus_space_write_4(sc->sc_memt, sc->sc_regh, PM2_VCLKCTL,
Indexes created Sun Oct 19 02:09:48 GMT 2025