Cross Reference: /src/sys/dev/pci/twa.c

Lines Matching defs:status_reg
1064 	uint32_t		status_reg;
1087 	status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1088 	if ((error = twa_check_ctlr_state(sc, status_reg)))
1091 	if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) {
1137 	uint32_t			status_reg;
1140 		status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1141 		if (twa_check_ctlr_state(sc, status_reg))
1143 		if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY)
1359 	uint32_t			status_reg;
1362 		status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1363 		if ((rv = twa_check_ctlr_state(sc, status_reg)))
1365 		if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY)
1880 	uint32_t	status_reg;
1885 	status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1886 	if (twa_check_ctlr_state(sc, status_reg)) {
1891 	if (status_reg & TWA_STATUS_HOST_INTERRUPT) {
1896 	if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) {
1907 	if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) {
1914 	if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) {
2627 	uint32_t	status_reg;
2664 	status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
2665 	if (TWA_STATUS_ERRORS(status_reg) ||
2666 	    twa_check_ctlr_state(sc, status_reg)) {
2678 	uint32_t	status_reg;
2687 		status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
2689 		if ((status_reg & status) == status)
3067  *			status_reg	-- value in the status register
3073 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg)
3080 	if ((status_reg & TWA_STATUS_EXPECTED_BITS) !=
3095 	if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) {
3103 		if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) {
3112 		if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) {
3120 		if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) {
3136 		if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) {
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