Cross Reference: /src/sys/dev/pci/unichromefb.c

Lines Matching defs:regnum
809 	int regnum, val;
813 	regnum = val = 0;
825 				regnum = iga1_crtc_reg.hor_total.reg_num;
831 				regnum = iga1_crtc_reg.hor_addr.reg_num;
837 				regnum = iga1_crtc_reg.hor_blank_start.reg_num;
844 				regnum = iga1_crtc_reg.hor_blank_end.reg_num;
850 				regnum = iga1_crtc_reg.hor_sync_start.reg_num;
857 				regnum = iga1_crtc_reg.hor_sync_end.reg_num;
863 				regnum = iga1_crtc_reg.ver_total.reg_num;
869 				regnum = iga1_crtc_reg.ver_addr.reg_num;
875 				regnum = iga1_crtc_reg.ver_blank_start.reg_num;
882 				regnum = iga1_crtc_reg.ver_blank_end.reg_num;
888 				regnum = iga1_crtc_reg.ver_sync_start.reg_num;
895 				regnum = iga1_crtc_reg.ver_sync_end.reg_num;
911 		uni_load_reg(sc, val, regnum, reg, VIACR);
918 uni_load_reg(struct unichromefb_softc *sc, int timing, int regnum,
929 	for (i = 0; i < regnum; i++) {
1014 	int val, regnum;
1038 		regnum =
1041 		uni_load_reg(sc, val, regnum, reg, VIASR);
1045 		regnum = fifo_threshold_select_reg.iga1_fifo_threshold_select_reg.reg_num;
1047 		uni_load_reg(sc, val, regnum, reg, VIASR);
1051 		regnum = fifo_high_threshold_select_reg.iga1_fifo_high_threshold_select_reg.reg_num;
1053 		uni_load_reg(sc, val, regnum, reg, VIASR);
1057 		regnum = display_queue_expire_num_reg.iga1_display_queue_expire_num_reg.reg_num;
1059 		uni_load_reg(sc, val, regnum, reg, VIASR);
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