Lines Matching refs:sc_regh
81 bus_space_handle_t sc_regh;
181 do {} while ((bus_space_read_4(sc->sc_memt, sc->sc_regh,
189 do {} while ((bus_space_read_4(sc->sc_memt, sc->sc_regh,
231 sc->sc_regh = vaa->vaa_regh;
233 sc->sc_dataport = bus_space_vaddr(sc->sc_memt, sc->sc_regh);
238 reg = bus_space_read_4(sc->sc_memt, sc->sc_regh, SM502_DRAM_CONTROL);
260 sc->sc_width = (bus_space_read_4(sc->sc_memt, sc->sc_regh,
262 sc->sc_height = (bus_space_read_4(sc->sc_memt, sc->sc_regh,
722 bus_space_write_4(sc->sc_memt, sc->sc_regh,
734 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_COLOR_COMP_MASK, 0);
736 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PLANEMASK,
739 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_CLIP_TOP_LEFT, 0);
741 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_SRC_BASE, 0);
742 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DST_BASE, 0);
744 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PITCH,
747 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_WINDOW_WIDTH,
749 reg = bus_space_read_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_DISP_CTRL);
754 bus_space_write_4(sc->sc_memt, sc->sc_regh,
760 bus_space_write_4(sc->sc_memt, sc->sc_regh,
767 bus_space_write_4(sc->sc_memt, sc->sc_regh,
773 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_FB_OFFSET,
780 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_DISP_CTRL,
789 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_CRSR_XY,
791 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_CRSR_COL12,
793 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_CRSR_COL3,
795 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_CRSR_ADDR,
806 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_CRSR_ADDR,
817 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_CONTROL,
822 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_FOREGROUND,
824 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DST,
826 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DIMENSION,
857 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_CONTROL, cmd);
858 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_SRC,
860 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DST,
862 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DIMENSION,
964 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_CONTROL, cmd);
965 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_FOREGROUND, fg);
966 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_BACKGROUND, bg);
967 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_SRC, 0);
968 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DST, (x << 16) | y);
969 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1033 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_CONTROL, cmd);
1034 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_SRC, 0);
1035 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DST, (x << 16) | y);
1036 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DIMENSION,
1061 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1065 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1122 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_CONTROL, cmd);
1123 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_SRC, 0);
1124 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DST, (x << 16) | y);
1125 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_DIMENSION,
1164 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1172 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1176 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1326 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PWM0, pwm);
1385 bus_space_write_4(sc->sc_memt, sc->sc_regh, SM502_PANEL_CRSR_XY, val);
1402 bus_space_write_4(sc->sc_memt, sc->sc_regh,
1425 bus_space_write_2(sc->sc_memt, sc->sc_regh,
1435 bus_space_write_2(sc->sc_memt, sc->sc_regh,
Indexes created Tue Oct 21 15:09:54 GMT 2025