Lines Matching refs:bmcr
410 /* Use `ifm_data' to store BMCR bits */
1344 uint16_t bmcr;
1346 be_mii_readreg(self, phy, MII_BMCR, &bmcr);
1347 if ((bmcr & BMCR_RESET) == 0)
1352 aprint_error_dev(self, "bmcr reset failed\n");
1439 uint16_t bmcr, bmsr;
1459 be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR, &bmcr);
1461 BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO);
1471 be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR, &bmcr);
1477 bmcr |= BMCR_S100;
1479 bmcr &= ~BMCR_S100;
1482 bmcr &= ~BMCR_S100;
1483 bmcr |= sc->sc_intphy_curspeed;
1486 bmcr |= BMCR_ISO;
1492 bmcr |= BMCR_FDX;
1494 bmcr &= ~BMCR_FDX;
1496 be_mii_writereg(self, BE_PHY_INTERNAL, MII_BMCR, bmcr);
1526 be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR, &bmcr);
1530 BE_PHY_INTERNAL, MII_BMCR, &bmcr);
1533 sc->sc_intphy_curspeed = (bmcr & BMCR_S100);
1536 bmcr &= ~BMCR_ISO;
1538 BE_PHY_INTERNAL, MII_BMCR, bmcr);
1542 (bmcr & BMCR_S100) ? "100" : "10");
1559 be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR, &bmcr);
1561 bmcr ^= BMCR_S100;
1562 be_mii_writereg(self, BE_PHY_INTERNAL, MII_BMCR, bmcr);
1568 be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR, &bmcr);
1570 BE_PHY_INTERNAL, MII_BMCR, bmcr | BMCR_ISO);
1594 uint16_t bmcr, bmsr;
1602 be_mii_readreg(self, BE_PHY_INTERNAL, MII_BMCR, &bmcr);
1604 switch (bmcr & (BMCR_S100 | BMCR_FDX)) {
Indexes created Tue Oct 28 12:10:06 GMT 2025