Lines Matching refs:u_int8_t
63 u_int8_t opcode;
64 u_int8_t flags;
68 u_int8_t vendor_specific;
69 u_int8_t interleave[2];
70 u_int8_t control;
83 u_int8_t reserved;
84 u_int8_t flags;
93 u_int8_t defect_lst_len[2];
101 u_int8_t ip_modifier;
102 u_int8_t pattern_type;
107 u_int8_t pattern_length[2];
109 u_int8_t pattern[...];
121 u_int8_t block_address[4];
126 u_int8_t cylinder[3];
127 u_int8_t head;
128 u_int8_t bytes_from_index[4];
133 u_int8_t cylinder[3];
134 u_int8_t head;
135 u_int8_t sector[4];
145 u_int8_t opcode;
146 u_int8_t byte2;
147 u_int8_t unused[3];
148 u_int8_t control;
156 u_int8_t opcode;
157 u_int8_t byte2;
158 u_int8_t reserved[3];
159 u_int8_t control;
165 u_int8_t opcode;
166 u_int8_t addr[3];
168 u_int8_t length;
169 u_int8_t control;
177 u_int8_t opcode;
178 u_int8_t flags;
182 u_int8_t addr[4];
183 u_int8_t byte7;
184 u_int8_t length[2];
185 u_int8_t control;
193 u_int8_t opcode;
194 u_int8_t byte2;
200 u_int8_t flags;
201 u_int8_t reserved[4];
202 u_int8_t length[2];
203 u_int8_t control;
208 u_int8_t opcode;
209 u_int8_t flags; /* see SYNCHRONIZE CACHE (10) */
210 u_int8_t addr[8];
211 u_int8_t length[4];
212 u_int8_t byte15;
213 u_int8_t control;
219 u_int8_t reserved[2];
220 u_int8_t length[2];
222 u_int8_t dlbaddr[4];
227 u_int8_t reserved;
228 u_int8_t flags;
229 u_int8_t length[2];
240 u_int8_t pg_code; /* page code (should be 1) */
241 u_int8_t pg_length; /* page length (should be 0x0a) */
242 u_int8_t flags; /* error recovery flags */
251 u_int8_t rd_retry_ct; /* read retry count */
252 u_int8_t corr_span; /* correction span */
253 u_int8_t hd_off_ct; /* head offset count */
254 u_int8_t dat_strb_off_ct; /* data strobe offset count */
255 u_int8_t reserved1;
256 u_int8_t wr_retry_ct; /* write retry count */
257 u_int8_t reserved2;
258 u_int8_t recov_tm_lim[2]; /* recovery time limit */
261 u_int8_t pg_code; /* page code (should be 3) */
262 u_int8_t pg_length; /* page length (should be 0x16) */
263 u_int8_t trk_z[2]; /* tracks per zone */
264 u_int8_t alt_sec[2]; /* alternate sectors per zone */
265 u_int8_t alt_trk_z[2]; /* alternate tracks per zone */
266 u_int8_t alt_trk_v[2]; /* alternate tracks per volume */
267 u_int8_t ph_sec_t[2]; /* physical sectors per track */
268 u_int8_t bytes_s[2]; /* bytes per sector */
269 u_int8_t interleave[2]; /* interleave */
270 u_int8_t trk_skew[2]; /* track skew factor */
271 u_int8_t cyl_skew[2]; /* cylinder skew */
272 u_int8_t flags; /* various */
277 u_int8_t reserved1;
278 u_int8_t reserved2;
279 u_int8_t reserved3;
282 u_int8_t pg_code; /* page code (should be 4) */
283 u_int8_t pg_length; /* page length (should be 0x16) */
284 u_int8_t ncyl[3]; /* number of cylinders */
285 u_int8_t nheads; /* number of heads */
286 u_int8_t st_cyl_wp[3]; /* starting cyl., write precomp */
287 u_int8_t st_cyl_rwc[3]; /* starting cyl., red. write cur */
288 u_int8_t driv_step[2]; /* drive step rate */
289 u_int8_t land_zone[3]; /* landing zone cylinder */
290 u_int8_t sp_sync_ctl; /* spindle synch control */
296 u_int8_t rot_offset; /* rotational offset (for spindle synch) */
297 u_int8_t reserved1;
298 u_int8_t rpm[2]; /* media rotation speed */
299 u_int8_t reserved2;
300 u_int8_t reserved3;
303 u_int8_t pg_code; /* page code (should be 5) */
304 u_int8_t pg_length; /* page length (should be 0x1e) */
305 u_int8_t xfr_rate[2];
306 u_int8_t nheads; /* number of heads */
307 u_int8_t ph_sec_tr; /* physical sectors per track */
308 u_int8_t bytes_s[2]; /* bytes per sector */
309 u_int8_t ncyl[2]; /* number of cylinders */
310 u_int8_t st_cyl_wp[2]; /* start cyl., write precomp */
311 u_int8_t st_cyl_rwc[2]; /* start cyl., red. write cur */
312 u_int8_t driv_step[2]; /* drive step rate */
313 u_int8_t driv_step_w; /* drive step pulse width */
314 u_int8_t head_settle[2];/* head settle delay */
315 u_int8_t motor_on; /* motor on delay */
316 u_int8_t motor_off; /* motor off delay */
317 u_int8_t flags; /* various flags */
321 u_int8_t step_p_cyl; /* step pulses per cylinder */
322 u_int8_t write_pre; /* write precompensation */
323 u_int8_t head_load; /* head load delay */
324 u_int8_t head_unload; /* head unload delay */
325 u_int8_t pin_34_2; /* pin 34 (6) pin 2 (7/11) definition */
326 u_int8_t pin_4_1; /* pin 4 (8/9) pin 1 (13) definition */
327 u_int8_t rpm[2]; /* rotational rate */
328 u_int8_t reserved1;
329 u_int8_t reserved2;
332 u_int8_t pg_code; /* page code (should be 8) */
333 u_int8_t pg_length; /* page length (should be 0x0a) */
334 u_int8_t flags; /* cache parameter flags */
343 u_int8_t ret_prio; /* retention priority */
348 u_int8_t dis_prefetch_xfer_len[2];
349 u_int8_t min_prefetch[2];
350 u_int8_t max_prefetch[2];
351 u_int8_t max_prefetch_ceiling[2];
352 u_int8_t flags2; /* additional cache param flags */
358 u_int8_t num_cache_segments;
359 u_int8_t cache_segment_size[2];
360 u_int8_t reserved1;
361 u_int8_t non_cache_segment_size[2];
364 u_int8_t pg_code; /* page code (should be 0x0a) */
365 u_int8_t pg_length; /* page length (should be 0x0a) */
366 u_int8_t ctl_flags1; /* First set of flags */
372 u_int8_t ctl_flags2; /* Second set of flags */
379 u_int8_t ctl_flags3; /* Third set of flags */
389 u_int8_t ctl_autoload; /* autoload mode control */
391 u_int8_t ctl_r_hld[2]; /* RAERP holdoff period */
392 u_int8_t ctl_busy[2]; /* busy timeout period */
393 u_int8_t ctl_selt[2]; /* extended self-test completion time */
399 /*1*/ u_int8_t device;
400 /*2*/ u_int8_t pagecode;
401 /*3*/ u_int8_t length[2];
403 /*4*/ u_int8_t threshold_exponent;
404 /*5*/ u_int8_t flags;
408 /*6*/ u_int8_t reserved6[2];
413 u_int8_t opcode;
414 u_int8_t byte2;
415 u_int8_t reserved3[4];
416 u_int8_t byte7;
417 u_int8_t length[2];
418 u_int8_t control;
422 u_int8_t unmap_data_length[2];
423 u_int8_t unmap_block_descriptor_data_length[2];
424 u_int8_t reserved5[4];
426 u_int8_t addr[8];
427 u_int8_t len[4];
428 u_int8_t reserved13[4];
Indexes created Sat Sep 20 22:09:52 GMT 2025