Lines Matching defs:hs_timing
963 int width, value, hs_timing, bus_clock, error;
997 hs_timing = EXT_CSD_HS_TIMING_HS200;
1000 hs_timing = EXT_CSD_HS_TIMING_HIGHSPEED;
1003 hs_timing = EXT_CSD_HS_TIMING_HIGHSPEED;
1005 hs_timing = EXT_CSD_HS_TIMING_LEGACY;
1041 if (hs_timing == EXT_CSD_HS_TIMING_HIGHSPEED &&
1043 hs_timing = EXT_CSD_HS_TIMING_LEGACY;
1046 const int target_timing = hs_timing;
1047 if (hs_timing != EXT_CSD_HS_TIMING_LEGACY) {
1048 while (hs_timing >= EXT_CSD_HS_TIMING_LEGACY) {
1050 EXT_CSD_HS_TIMING, hs_timing, false);
1051 if (error == 0 || hs_timing == EXT_CSD_HS_TIMING_LEGACY)
1053 hs_timing--;
1056 if (hs_timing != target_timing) {
1059 target_timing, hs_timing);
1062 KASSERT(hs_timing < __arraycount(sdmmc_mmc_timings));
1063 sf->csd.tran_speed = sdmmc_mmc_timings[hs_timing];
1077 if (hs_timing != EXT_CSD_HS_TIMING_LEGACY) {
1085 if (ext_csd[EXT_CSD_HS_TIMING] != hs_timing) {
1087 "HS_TIMING set failed\n");
1093 * HS_TIMING must be set to 0x1 before setting BUS_WIDTH
1097 hs_timing == EXT_CSD_HS_TIMING_HIGHSPEED &&
1142 if (hs_timing == EXT_CSD_HS_TIMING_HS200) {
Indexes created Thu Oct 02 01:09:59 GMT 2025