Lines Matching refs:sf
331 struct sdmmc_function *sf;
360 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list)
365 sf = sdmmc_function_alloc(sc);
366 sf->rca = next_rca;
372 memcpy(sf->raw_cid, resp, sizeof(sf->raw_cid));
379 if (sdmmc_set_relative_addr(sc, sf) != 0) {
382 sdmmc_function_free(sf);
392 sc->sc_fn0 = sf;
394 SIMPLEQ_INSERT_TAIL(&sc->sf_head, sf, sf_list);
409 SIMPLEQ_FOREACH(sf, &sc->sf_head, sf_list) {
410 error = sdmmc_mem_send_csd(sc, sf, &resp);
412 SET(sf->flags, SFF_ERROR);
416 if (sdmmc_decode_csd(sc, resp, sf) != 0 ||
417 sdmmc_decode_cid(sc, sf->raw_cid, sf) != 0) {
418 SET(sf->flags, SFF_ERROR);
424 sdmmc_print_cid(&sf->cid);
433 struct sdmmc_function *sf)
450 struct sdmmc_csd *csd = &sf->csd;
462 SET(sf->flags, SFF_SDHC);
517 struct sdmmc_function *sf)
519 struct sdmmc_cid *cid = &sf->cid;
529 switch(sf->csd.mmcver) {
548 sf->csd.mmcver);
584 sdmmc_mem_init(struct sdmmc_softc *sc, struct sdmmc_function *sf)
591 error = sdmmc_select_card(sc, sf);
596 error = sdmmc_mem_set_blocklen(sc, sf, SDMMC_SECTOR_SIZE);
601 error = sdmmc_mem_sd_init(sc, sf);
603 error = sdmmc_mem_mmc_init(sc, sf);
606 SET(sf->flags, SFF_ERROR);
707 sdmmc_mem_set_blocklen(struct sdmmc_softc *sc, struct sdmmc_function *sf,
723 SDMMCDEVNAME(sc), 1 << sf->csd.read_bl_len, block_len));
767 sdmmc_mem_execute_tuning(struct sdmmc_softc *sc, struct sdmmc_function *sf)
775 switch (sf->csd.tran_speed) {
786 switch (sf->csd.tran_speed) {
802 sdmmc_mem_sd_init(struct sdmmc_softc *sc, struct sdmmc_function *sf)
809 bus_clock = uimin(sc->sc_busclk, sf->csd.tran_speed);
816 error = sdmmc_mem_send_scr(sc, sf, sf->raw_scr);
821 error = sdmmc_mem_decode_scr(sc, sf);
826 ISSET(sf->scr.bus_width, SCR_SD_BUS_WIDTHS_4BIT)) {
828 error = sdmmc_set_bus_width(sf, 4);
834 sf->width = 4;
838 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 &&
839 ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH)) {
841 error = sdmmc_mem_sd_switch(sf, 0, 1, 0, &status);
884 sdmmc_mem_sd_switch(sf, 1, 1, best_func, &status);
892 sf->csd.tran_speed =
905 if (sc->sc_busclk > sf->csd.tran_speed)
906 sc->sc_busclk = sf->csd.tran_speed;
921 error = sdmmc_mem_send_ssr(sc, sf, &status);
927 sdmmc_mem_decode_ssr(sc, sf, &status);
930 error = sdmmc_mem_execute_tuning(sc, sf);
937 if (!ISSET(sc->sc_caps, SMC_CAPS_SPI_MODE) && sf->scr.support_cmd48) {
939 error = sdmmc_mem_read_extr_single(sc, sf, SD_EXTR_MIO_MEM, 0, 0,
942 sdmmc_mem_decode_general_info(sc, sf, ginfo);
947 if (sf->ssr.cache && sf->ext_sd.pef.valid) {
948 error = sdmmc_mem_pef_enable_cache(sc, sf);
953 SET(sf->flags, SFF_CACHE_ENABLED);
961 sdmmc_mem_mmc_init(struct sdmmc_softc *sc, struct sdmmc_function *sf)
971 bus_clock = uimin(sc->sc_busclk, sf->csd.tran_speed);
978 if (sf->csd.mmcver >= MMC_CSD_MMCVER_4_0) {
986 if ((sf->csd.csdver == MMC_CSD_CSDVER_EXT_CSD) &&
993 sf->ext_csd.rev = ext_csd[EXT_CSD_REV];
1025 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL,
1039 sf->width = width;
1049 error = sdmmc_mem_mmc_switch(sf, EXT_CSD_CMD_SET_NORMAL,
1063 sf->csd.tran_speed = sdmmc_mmc_timings[hs_timing];
1065 if (sc->sc_busclk > sf->csd.tran_speed)
1066 sc->sc_busclk = sf->csd.tran_speed;
1099 error = sdmmc_mem_mmc_switch(sf,
1138 SET(sf->flags, SFF_SDHC);
1139 sf->csd.capacity = sectors;
1146 error = sdmmc_mem_execute_tuning(sc, sf);
1154 if (sf->ext_csd.rev >= 5) {
1155 sf->ext_csd.rst_n_function =
1159 if (sf->ext_csd.rev >= 6) {
1160 sf->ext_csd.cache_size =
1163 if (sf->ext_csd.cache_size > 0) {
1165 error = sdmmc_mem_mmc_switch(sf,
1172 SET(sf->flags, SFF_CACHE_ENABLED);
1176 if (sc->sc_busclk > sf->csd.tran_speed)
1177 sc->sc_busclk = sf->csd.tran_speed;
1219 sdmmc_mem_send_csd(struct sdmmc_softc *sc, struct sdmmc_function *sf,
1228 cmd.c_arg = MMC_ARG_RCA(sf->rca);
1247 sdmmc_mem_send_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf,
1291 error = sdmmc_app_command(sc, sf, &cmd);
1323 sdmmc_mem_decode_scr(struct sdmmc_softc *sc, struct sdmmc_function *sf)
1332 resp[0] = be32toh(sf->raw_scr[1]) >> 8; // LSW
1333 resp[1] = be32toh(sf->raw_scr[0]); // MSW
1338 sf->scr.sd_spec = SCR_SD_SPEC(resp);
1339 if (sf->scr.sd_spec == 2) {
1340 sf->scr.sd_spec3 = SCR_SD_SPEC3(resp);
1341 if (sf->scr.sd_spec3) {
1342 sf->scr.sd_spec4 = SCR_SD_SPEC4(resp);
1345 sf->scr.bus_width = SCR_SD_BUS_WIDTHS(resp);
1346 if (sf->scr.sd_spec4) {
1347 sf->scr.support_cmd48 = SCR_CMD_SUPPORT_CMD48(resp);
1352 ver, sf->scr.sd_spec, sf->scr.sd_spec3, sf->scr.sd_spec4, sf->scr.bus_width));
1363 sdmmc_mem_send_ssr(struct sdmmc_softc *sc, struct sdmmc_function *sf,
1407 error = sdmmc_app_command(sc, sf, &cmd);
1442 sdmmc_mem_decode_ssr(struct sdmmc_softc *sc, struct sdmmc_function *sf,
1471 sf->ssr.cache = true;
1505 sdmmc_mem_decode_general_info(struct sdmmc_softc *sc, struct sdmmc_function *sf,
1538 sf->ext_sd.pef.valid = true;
1539 sf->ext_sd.pef.fno =
1541 sf->ext_sd.pef.start_addr =
1555 struct sdmmc_function *sf)
1560 error = sdmmc_mem_read_extr_single(sc, sf, SD_EXTR_MIO_MEM,
1561 sf->ext_sd.pef.fno, sf->ext_sd.pef.start_addr,
1572 error = sdmmc_mem_write_extr_single(sc, sf, SD_EXTR_MIO_MEM,
1573 sf->ext_sd.pef.fno,
1574 sf->ext_sd.pef.start_addr + SD_PEF_CACHE_ENABLE_OFFSET, 1,
1661 sdmmc_mem_read_extr_single(struct sdmmc_softc *sc, struct sdmmc_function *sf,
1729 sdmmc_mem_write_extr_single(struct sdmmc_softc *sc, struct sdmmc_function *sf,
1800 cmd.c_arg = MMC_ARG_RCA(sf->rca);
1823 sdmmc_set_bus_width(struct sdmmc_function *sf, int width)
1825 struct sdmmc_softc *sc = sf->sc;
1849 error = sdmmc_app_command(sc, sf, &cmd);
1856 sdmmc_mem_sd_switch(struct sdmmc_function *sf, int mode, int group,
1859 struct sdmmc_softc *sc = sf->sc;
1866 if (sf->scr.sd_spec >= SCR_SD_SPEC_VER_1_10 &&
1867 !ISSET(sf->csd.ccc, SD_CSD_CCC_SWITCH))
1938 sdmmc_mem_mmc_switch(struct sdmmc_function *sf, uint8_t set, uint8_t index,
1941 struct sdmmc_softc *sc = sf->sc;
1963 cmd.c_arg = MMC_ARG_RCA(sf->rca);
2015 sdmmc_mem_single_read_block(struct sdmmc_function *sf, uint32_t blkno,
2018 struct sdmmc_softc *sc = sf->sc;
2026 error = sdmmc_mem_read_block_subr(sf, sc->sc_dmap, blkno + i,
2038 sdmmc_mem_single_segment_dma_read_block(struct sdmmc_function *sf,
2041 struct sdmmc_softc *sc = sf->sc;
2054 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, datalen,
2057 error = sdmmc_mem_read_block_subr(sf, sf->bbuf_dmap,
2060 bus_dmamap_unload(sc->sc_dmat, sf->bbuf_dmap);
2064 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, datalen,
2068 memcpy(data, sf->bbuf, datalen);
2076 error = bus_dmamap_load(sc->sc_dmat, sf->sseg_dmap,
2081 bus_dmamap_sync(sc->sc_dmat, sf->sseg_dmap, 0, len,
2084 error = sdmmc_mem_read_block_subr(sf, sf->sseg_dmap,
2087 bus_dmamap_unload(sc->sc_dmat, sf->sseg_dmap);
2091 bus_dmamap_sync(sc->sc_dmat, sf->sseg_dmap, 0, len,
2094 bus_dmamap_unload(sc->sc_dmat, sf->sseg_dmap);
2103 sdmmc_mem_read_block_subr(struct sdmmc_function *sf, bus_dmamap_t dmap,
2106 struct sdmmc_softc *sc = sf->sc;
2111 error = sdmmc_select_card(sc, sf);
2123 if (!ISSET(sf->flags, SFF_SDHC))
2126 if (ISSET(sf->flags, SFF_SDHC))
2150 cmd.c_arg = MMC_ARG_RCA(sf->rca);
2163 cmd.c_arg = MMC_ARG_RCA(sf->rca);
2177 sdmmc_mem_read_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data,
2180 struct sdmmc_softc *sc = sf->sc;
2187 error = sdmmc_mem_single_read_block(sf, blkno, data, datalen);
2192 error = sdmmc_mem_read_block_subr(sf, sc->sc_dmap, blkno, data,
2214 error = sdmmc_mem_single_segment_dma_read_block(sf, blkno,
2222 error = sdmmc_mem_read_block_subr(sf, sc->sc_dmap, blkno, data,
2241 sdmmc_mem_single_write_block(struct sdmmc_function *sf, uint32_t blkno,
2244 struct sdmmc_softc *sc = sf->sc;
2252 error = sdmmc_mem_write_block_subr(sf, sc->sc_dmap, blkno + i,
2264 sdmmc_mem_single_segment_dma_write_block(struct sdmmc_function *sf,
2267 struct sdmmc_softc *sc = sf->sc;
2281 memcpy(sf->bbuf, data, datalen);
2283 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, datalen,
2286 error = sdmmc_mem_write_block_subr(sf, sf->bbuf_dmap,
2289 bus_dmamap_unload(sc->sc_dmat, sf->bbuf_dmap);
2293 bus_dmamap_sync(sc->sc_dmat, sf->bbuf_dmap, 0, datalen,
2302 error = bus_dmamap_load(sc->sc_dmat, sf->sseg_dmap,
2307 bus_dmamap_sync(sc->sc_dmat, sf->sseg_dmap, 0, len,
2310 error = sdmmc_mem_write_block_subr(sf, sf->sseg_dmap,
2313 bus_dmamap_unload(sc->sc_dmat, sf->sseg_dmap);
2317 bus_dmamap_sync(sc->sc_dmat, sf->sseg_dmap, 0, len,
2320 bus_dmamap_unload(sc->sc_dmat, sf->sseg_dmap);
2330 sdmmc_mem_write_block_subr(struct sdmmc_function *sf, bus_dmamap_t dmap,
2333 struct sdmmc_softc *sc = sf->sc;
2338 error = sdmmc_select_card(sc, sf);
2350 error = sdmmc_app_command(sc, sf, &cmd);
2362 if (!ISSET(sf->flags, SFF_SDHC))
2365 if (ISSET(sf->flags, SFF_SDHC))
2401 cmd.c_arg = MMC_ARG_RCA(sf->rca);
2415 sdmmc_mem_write_block(struct sdmmc_function *sf, uint32_t blkno, u_char *data,
2418 struct sdmmc_softc *sc = sf->sc;
2432 error = sdmmc_mem_single_write_block(sf, blkno, data, datalen);
2437 error = sdmmc_mem_write_block_subr(sf, sc->sc_dmap, blkno, data,
2461 error = sdmmc_mem_single_segment_dma_write_block(sf, blkno,
2469 error = sdmmc_mem_write_block_subr(sf, sc->sc_dmap, blkno, data,
2487 sdmmc_mem_discard(struct sdmmc_function *sf, uint32_t sblkno, uint32_t eblkno)
2489 struct sdmmc_softc *sc = sf->sc;
2507 if (!ISSET(sf->flags, SFF_SDHC))
2519 if (!ISSET(sf->flags, SFF_SDHC))
2547 sdmmc_mem_flush_cache(struct sdmmc_function *sf, bool poll)
2549 struct sdmmc_softc *sc = sf->sc;
2552 if (!ISSET(sf->flags, SFF_CACHE_ENABLED))
2559 KASSERT(sf->ext_sd.pef.valid);
2560 error = sdmmc_mem_write_extr_single(sc, sf, SD_EXTR_MIO_MEM,
2561 sf->ext_sd.pef.fno,
2562 sf->ext_sd.pef.start_addr + SD_PEF_CACHE_FLUSH_OFFSET, 1,
2567 error = sdmmc_mem_read_extr_single(sc, sf, SD_EXTR_MIO_MEM,
2568 sf->ext_sd.pef.fno, sf->ext_sd.pef.start_addr,
2575 error = sdmmc_mem_mmc_switch(sf,
Indexes created Mon Oct 20 11:09:49 GMT 2025