Lines Matching defs:ims332_write_reg
152 static void ims332_write_reg(int, uint32_t);
344 ims332_write_reg(IMS332_REG_BOOT, 0x2c);
345 ims332_write_reg(IMS332_REG_CSR_A,
347 ims332_write_reg(IMS332_REG_HALF_SYNCH, 0x10);
348 ims332_write_reg(IMS332_REG_BACK_PORCH, 0x21);
349 ims332_write_reg(IMS332_REG_DISPLAY, 0x100);
350 ims332_write_reg(IMS332_REG_SHORT_DIS, 0x5d);
351 ims332_write_reg(IMS332_REG_BROAD_PULSE, 0x9f);
352 ims332_write_reg(IMS332_REG_LINE_TIME, 0x146);
353 ims332_write_reg(IMS332_REG_V_SYNC, 0x0c);
354 ims332_write_reg(IMS332_REG_V_PRE_EQUALIZE, 0x02);
355 ims332_write_reg(IMS332_REG_V_POST_EQUALIZE, 0x02);
356 ims332_write_reg(IMS332_REG_V_BLANK, 0x2a);
357 ims332_write_reg(IMS332_REG_V_DISPLAY, 0x600);
358 ims332_write_reg(IMS332_REG_LINE_START, 0x10);
359 ims332_write_reg(IMS332_REG_MEM_INIT, 0x0a);
360 ims332_write_reg(IMS332_REG_COLOR_MASK, 0xffffff);
361 ims332_write_reg(IMS332_REG_CSR_A,
370 ims332_write_reg(IMS332_REG_LUT_BASE + i, bgr);
375 ims332_write_reg(IMS332_REG_CURSOR_RAM + i, 0);
382 ims332_write_reg(IMS332_REG_CURSOR_LUT_0, 0);
383 ims332_write_reg(IMS332_REG_CURSOR_LUT_1, 0xffffff);
384 ims332_write_reg(IMS332_REG_CURSOR_LUT_2, 0xffffff);
458 ims332_write_reg(IMS332_REG_CSR_A, sc->sc_csr);
537 ims332_write_reg(IMS332_REG_CSR_A, sc->sc_csr);
641 ims332_write_reg(IMS332_REG_CSR_A, sc->sc_csr);
684 ims332_write_reg(IMS332_REG_LUT_BASE + i, rgb);
697 ims332_write_reg(IMS332_REG_CURSOR_LOC, pos);
709 ims332_write_reg(IMS332_REG_CURSOR_LUT_1, rgb);
713 ims332_write_reg(IMS332_REG_CURSOR_LUT_2, rgb);
740 ims332_write_reg(IMS332_REG_CURSOR_RAM + i, bits);
745 ims332_write_reg(IMS332_REG_CURSOR_RAM + i, 0);
751 ims332_write_reg(int regno, uint32_t val)
Indexes created Wed Oct 15 03:09:54 GMT 2025