Lines Matching refs:counter
97 armv7_pmu_set_pmevtyper(u_int counter, uint64_t val)
99 armreg_pmselr_write(counter);
105 armv7_pmu_set_pmevcntr(u_int counter, uint32_t val)
107 armreg_pmselr_write(counter);
113 armv7_pmu_get_pmevcntr(u_int counter)
115 armreg_pmselr_write(counter);
122 armv7_pmu_getset_pmevcntr(u_int counter, uint64_t val)
126 armreg_pmselr_write(counter);
140 armv7_pmu_counter_bitwidth(u_int counter)
146 armv7_pmu_counter_estimate_freq(u_int counter)
156 armv7_pmu_valid_event(u_int counter, const tprof_param_t *param)
167 armv7_pmu_configure_event(u_int counter, const tprof_param_t *param)
169 /* Disable event counter */
170 armreg_pmcntenclr_write(__BIT(counter) & PMCNTEN_P);
173 armreg_pmintenclr_write(__BIT(counter) & PMINTEN_P);
175 /* Configure event counter */
181 armv7_pmu_set_pmevtyper(counter, pmevtyper);
185 * Whether profiled or not, the counter width of armv7 is 32 bits,
188 armreg_pmintenset_write(__BIT(counter) & PMINTEN_P);
191 armreg_pmovsr_write(__BIT(counter) & PMOVS_P);
193 /* Reset the counter */
194 armv7_pmu_set_pmevcntr(counter, param->p_value);
213 /* Disable event counter */
238 /* Account for the counter, and reset */
252 /* Counter has overflowed */
Indexes created Thu Oct 16 14:10:15 GMT 2025