Lines Matching refs:emdtv_write_1
113 emdtv_write_1(sc, 0x02, 0xa0, 0x23);
259 emdtv_write_1(sc, UR_GET_STATUS, EM28XX_XCLK_REG, 0x97);
260 emdtv_write_1(sc, UR_GET_STATUS, EM28XX_I2C_CLK_REG,
263 emdtv_write_1(sc, UR_GET_STATUS, 0x08, 0x2d);
315 emdtv_write_1(struct emdtv_softc *sc, uint8_t req, uint16_t index, uint8_t val)
396 emdtv_write_1(sc, 0x03, 0xa0, val);
439 emdtv_write_1(sc, UR_GET_STATUS, reg, gpio);
444 emdtv_write_1(sc, UR_GET_STATUS, reg, gpio);
449 emdtv_write_1(sc, UR_GET_STATUS, reg, gpio);
459 emdtv_write_1(sc, UR_GET_STATUS, EM28XX_XCLK_REG, 0x27);
460 emdtv_write_1(sc, UR_GET_STATUS, EM28XX_I2C_CLK_REG, 0x40);
461 emdtv_write_1(sc, UR_GET_STATUS, 0x08, 0xff);
462 emdtv_write_1(sc, UR_GET_STATUS, 0x04, 0x00);
464 emdtv_write_1(sc, UR_GET_STATUS, 0x04, 0x08);
466 emdtv_write_1(sc, UR_GET_STATUS, 0x08, 0xff);
468 emdtv_write_1(sc, UR_GET_STATUS, 0x08, 0x2d);
470 emdtv_write_1(sc, UR_GET_STATUS, 0x08, 0x3d);
471 //emdtv_write_1(sc, UR_GET_STATUS, 0x0f, 0xa7);